A DPLL-Centric Bluetooth Low-Energy Transceiver With a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65-nm CMOS

Abstract

This paper presents a Bluetooth low-energy (BLE) transceiver (TRX) achieving ultra-low-power operation for Internet-of-Things (IoT) applications. The proposed TRX utilizes a wide-bandwidth low-power fractional-N digital phase-locked loop (DPLL) as a central component to perform multiple roles: a direct frequency modulator for the transmitter (TX), an analogto-digital converter (ADC) for the receiver (RX), a local oscillator for RX, and a frequency and phase synchronizer for the RX. The DPLL-based single-path downconversion method is adapted to halve the analog baseband circuit to further reduce the power consumption while maintaining a high interference rejection. A DPLL-based ADC with a digital-to-analog converter feedback greatly improves the ADC dynamic range, which improves the RX sensitivity and interference tolerance. By maximally reducing the required radio frequency and analog front-end components in RX, an RX power consumption of 2.3 mW is achieved with a −94 dBm sensitivity. The RX also satisfied all interference requirements with a certain margin. A 5.0-mW TX is achieved when delivering an output power of 0 dBm with a frequency-shift keying error of only 1.89%.

A compact and low-power wireless receiver for implanted medical backscatter

“…A comparison with other state of the art work is shown in Table II. Recently, there are several publications on low power wireless transceivers such as Bluetooth Low Energy (BLE) [21]. Some of the papers are designed for so-called "Wake-up Receivers", that usually has no transmitter and the purpose is to detect wake-up signal and wake up the main receiver, such as [9] and [11].…”

A 1.0 V, 5.4 pJ/bit GFSK Demodulator Based on an Injection Locked Ring Oscillator for Low-IF Receivers

“…10 (b), the phase shift  is 46.8° and ' is 39.6°. In this case also, the values θ and ϕ can be evaluated as 1.8° and 7.2° respectively as expected from (2), (3) and (4). In this implementation, the outputs are taken from the second stage delay cells.…”

“…Table III compares the performance of recently proposed GFSK demodulators with the proposed architecture. In comparison to [4]- [7] the proposed demodulator consumes significantly lesser power achieving energy efficiency at least 30 times better. The overall silicon area is 4 times smaller, thanks to its simple structure arising from the ILRO based approach.…”

“…The demand for GFSK transceivers having small feature sizes and lower power consumption has increased in recent Internetof-Things (IoT) and Medical Implanted Communication Service (MICS) applications. Consequently, research efforts have been focused on reducing the feature size as well as the power consumption of such transceivers [3][4]. GFSK transmitters can be power-efficient, as the constant envelope characteristics of the GFSK modulation allow the use of energy-efficient nonlinear power amplifiers, enabling a lowpower operation without any data distortion caused by spectral regrowth [5].…”

A Sub-mW Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> ADPLL With FOM of −246 dB for IoT Applications

“…Ultralow-power (ULP) TRXs will be the key elements in a variety of short-range wireless standards, e.g., bluetooth low energy (BLE), Zigbee, WPAN/WBAN, and Wi-Fi network. The radio frequency phase-locked loop (RF-PLL), as one of the most critical elements in TRX, consumes a significant amount of power [1] due to the phase noise and spurious requirement. Hence, a reduction in PLL's power will significantly lower the ULP TRX power consumption.…”