A domain wall-magnetic tunnel junction artificial synapse with notched geometry for accurate and efficient training of deep neural networks

Abstract

Inspired by the parallelism and efficiency of the brain, several candidates for artificial synapse devices have been developed for neuromorphic computing, yet a nonlinear and asymmetric synaptic response curve precludes their use for backpropagation, the foundation of modern supervised learning. Spintronic devices—which benefit from high endurance, low power consumption, low latency, and CMOS compatibility—are a promising technology for memory, and domain-wall magnetic tunnel junction (DW-MTJ) devices have been shown to implement synaptic functions such as long-term potentiation and spike-timing dependent plasticity. In this work, we propose a notched DW-MTJ synapse as a candidate for supervised learning. Using micromagnetic simulations at room temperature, we show that notched synapses ensure the non-volatility of the synaptic weight and allow for highly linear, symmetric, and reproducible weight updates using either spin transfer torque (STT) or spin–orbit torque (SOT) mechanisms of DW propagation. We use lookup tables constructed from micromagnetics simulations to model the training of neural networks built with DW-MTJ synapses on both the MNIST and Fashion-MNIST image classification tasks. Accounting for thermal noise and realistic process variations, the DW-MTJ devices achieve classification accuracy close to ideal floating-point updates using both STT and SOT devices at room temperature and at 400 K. Our work establishes the basis for a magnetic artificial synapse that can eventually lead to hardware neural networks with fully spintronic matrix operations implementing machine learning.

Energy Efficient Learning With Low Resolution Stochastic Domain Wall Synapse for Deep Neural Networks

“…Finally, the accuracy and energy consumption of our proposed DW based approach is compared with state-of-theart techniques in the literature. The accuracies that we achieve for 5-state DW are comparable to the RRAM [54] and PCM [38] and better than the DW approach presented in [48] that can provide 32-states.…”

“…The estimated energy consumption of ~ 26 nJ per inference is comparable with state-of-the-art non-volatile technologies such as RRAM [54] and PCM [38]. Moreover, our proposed 5-state DW based DNN consumes less power compared to 32state DW based DNN [48] for each synaptic weight update event as a 50 𝜇𝐴 and 1 ns duration current pulse is used to program the 32-state synapses as opposed to our synapse that requires 21 𝜇𝐴 and 1 ns duration current pulse (Note that SOT clock dominates the energy consumed in our case). Further, the DW-based approach presented in [25] consumes an energy ~ 8.64 fJ to program the synapse from one extreme conductance to the other, compared to our ~ 2.7 fJ.…”

“…For example, one can select five, three, or two different programming voltages to implement a 5-state, 3-state or 2-state synapse. The number of states that can be obtained from the device is limited due to the fact that with the presence of DMI, SOT current can cause DW titling long after the current stimulus is withdrawn [48]. Thus, in the presence of room temperature thermal noise and structural irregularities (edge roughness) DW motion becomes significantly stochastic.…”

Metaplastic and energy-efficient biocompatible graphene artificial synaptic transistors for enhanced accuracy neuromorphic computing

“…A promising approach for overcoming the power and latency shortfalls of traditional computing is through massively parallel neuromorphic systems 2,3 . A wide variety of devices have been proposed to build such systems, from mature technologies such as metal-oxide 4,5 and phase change memories 6,7 to emerging devices such as electrochemical 8 and magnetic memories [9][10][11][12] . Most of these systems, however, employ rigid materials, making them less suited for direct integration with biological matter.…”

Implementation of Highly Reliable and Energy‐Efficient Nonvolatile In‐Memory Computing using Multistate Domain Wall Spin–Orbit Torque Device

“…Some of the reported multistate realizations are based on in-plane magnetic anisotropic structures or geometric device fabrications with domain wall motion (DWM) models, e.g., the experimental demonstration of the two-level device based on DWM in a spin valve, [38] three-level device with the half-ring shape, [39] and four-state MTJ switchable with SOT. [40] Despite the available reports on pure simulation and prototype DW-MTJ devices, [8,[41][42][43][44][45] development is hindered by system integration and operation efficiency limits. Explicitly, to date, few functional implementations exist of SOT-MTJ devices with reliable and switchable multistates in a synthetic, CMOS compatible, and field-free integration.…”