A dielectrically isolated complementary bipolar technique for analog/Digital compatible LSI's

Sakurai, Takayasu; Ohno, Takao; Kato, K.; Inabe, Y.; Hayashi, Tetsuya

doi:10.1109/t-ed.1983.21287

Cited by 9 publications

(1 citation statement)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The high voltage two-wire side of the subscriber circuit was built in a 200 V dielectrically isolated complementary bipolar technology. A process was also reported with vertically double diffused transistors in complementary islands with breakdown voltages of more than 350 V and f of 450 and 200 MHz for the NPN and PNP transistors, respectively [12]. A subscriber line interface circuit that includes battery feed, supervision, and hybrid was demonstrated using this technology.…”

Section: Review Of Complementary Bipolar Technologiesmentioning

confidence: 97%

A complementary bipolar technology family with a Vertically Integrated PNP for high-frequency analog applications

Bashir

Hebert²,

DeSantis³

et al. 2001

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

Abstract-Silicon complementary bipolar processes offer the possibility of realizing high-performance circuits for a variety of analog applications. This paper presents a summary of silicon complementary bipolar process technology reported in recent years. Specifically, an overview of a family of silicon complementary bipolar process technologies, called Vertically Integrated PNP (VIP™ 1 ), which have been used for the realization of high-frequency analog circuits is presented. Three process technologies, termed VIP-3, VIP-3H, and VIP-4H offer device breakdowns of 40, 85, and 170 V, respectively. These processes feature optimized vertically integrated bipolar junction transistors (PNPs) along with high performance NPN transistors with polycrystalline silicon emitters, low parasitic polycrystalline silicon resistors, and metal-insulator-polycrystalline silicon capacitors. Key issues and aspects of the processes are described. These issues include the polycrystalline silicon emitter optimization and vertical and lateral device isolation in the transistors. Circuit design examples are also described which have been implemented in these technologies.

show abstract

Section: Review Of Complementary Bipolar Technologiesmentioning

confidence: 97%