A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology

Abstract

Teramac is a massively parallel experimental computer built at Hewlett-Packard Laboratories to investigate a wide range of different computational architectures. This machine contains about 220,000 hardware defects, any one of which could prove fatal to a conventional computer, and yet it operated 100 times faster than a high-end single-processor workstation for some of its configurations. The defect-tolerant architecture of Teramac, which incorporates a high communication bandwith that enables it to easi,b route around defects, has significant implications for any future nanometerscale computational paradigm. It may be feasible to chemically synthesize individual electronic components with less than a 100 percent yield, assemble them into systems with appreciable uncertainty in their connectivity, and still create a powerful and reliable data communications network. Future nanoscale computers may consist of extremely large-configuration memories that are programmed for specific tasks by a tutor that locates and tags the defects in the system. T h e last 25 years have witnessed astonishing advances in the fields of microelectron--its and computation. The first integrated circuit mlcro~rocessor, the Intel 4004, was able to perform roughly 5000 binary-coded decimal additions per second with a total power consumption of about 10 W (-500 additions ver Joule) in 1971. whereas mod-. " , ern lnicroprocessors can perform -3 X 106 additions oer Joule. The 1997 National L , Technology Roadlnap for Semiconductors (1) calls for an additional factor of lo3 , . increase in the computational efficiency by the vear 2012. If this eoal is attained. then perfArmance of the silycon-based integrated circuit \+~11 have imoroved bv nearlv seven orders of magnitud; in 40 years, using energy consumed per operation as a metric, with a single manufacturing paradigm. Although co~nplelnentarymetal oxide semiconductor (CMOS) technology is predicted by many researchers to run into significant physical limitations shortly after 2010 (Z), the enerev cost of an addition ooeration -,\+rillstill be nowhere near any fundamental physical limit. A crude estimate of the energy required to add two 10-digit decimal numbers, based on a thermodynamic analysis of nonreversible Boolean logic steps (3, 4) is -100.k.T.ln(2), which implies that 3 x 10'%dditions per Joule can be performed at room temperature without any reversible steps. Thus, there are potentially eight orders of magnitude in colnputational energy efficiency in a nonreversible machine available bevond the limits of CMOS technology. To achieve these f~~rther advances will require a totally different type of computational machinery, but knowing that such a system is in principle possible provides a strong incentive to hunt for it. The requirement for inventing a new technology paradigm has created exciting research opportunities for physical and biological scientists as well as for electrical engineers. Indeed, much of the current interest in interdisciplinary research in areas such as nanofabric...

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