2020
DOI: 10.1038/s41565-020-00779-y
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A deep-learning approach to realizing functionality in nanoelectronic devices

Abstract: DOI to the publisher's website.• The final author version and the galley proof are versions of the publication after peer review.• The final published version features the final layout of the paper including the volume, issue and page numbers. Link to publication General rightsCopyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal re… Show more

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Cited by 50 publications
(30 citation statements)
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“…The utilization of verified technologies for creating basic components of a universal set of logic elements (with reasonable values of the capacity of the Josephson junctions) allows us to count on the creation of a neuroprocessor with target performance indicators of the order of 10 −11 J and energy consumption at the level of 10 −18 J per operation of "calculating" the activation function. Examples of practical tasks with high requirements for performance, energy efficiency, and the accuracy of synchronization of the hardware platform that require the development of such devices are listed below [24,25]:…”
Section: Discussionmentioning
confidence: 99%
“…The utilization of verified technologies for creating basic components of a universal set of logic elements (with reasonable values of the capacity of the Josephson junctions) allows us to count on the creation of a neuroprocessor with target performance indicators of the order of 10 −11 J and energy consumption at the level of 10 −18 J per operation of "calculating" the activation function. Examples of practical tasks with high requirements for performance, energy efficiency, and the accuracy of synchronization of the hardware platform that require the development of such devices are listed below [24,25]:…”
Section: Discussionmentioning
confidence: 99%
“…[14] Understanding the effect of 1/f noise is, therefore, crucial for scaling up DNPU-based learning machines. [20,21] Through electrical measurements, we show here that the 1/f noise power and the DNPU response to external signals scale differently with the mean output current. As a consequence, the DNPU's signal-to-noise ratio (SNR), related to its dynamic range, shows a peak when plotted against the bias voltage that energizes the hopping transport in a three-terminal measurement.…”
Section: Introductionmentioning
confidence: 93%
“…The dopant network, [14] formed by electrostatically coupled dopant atoms in silicon and referred to as dopant network processing unit (DNPU), [20,21] has a typical footprint of only 300 Â 300 nm 2 and consumes a power of %1 μW or even less. We have shown that a single DNPU is capable of carrying out canonical machine learning tasks using "material learning" techniques.…”
Section: Introductionmentioning
confidence: 99%
“…Functionality can be realized in both types of devices by artificial evolution, where the control voltages are treated as 'genes' that evolve by mutation and cross-breeding in an evolutionary process to optimize fitness for the desired functionality [8,10]. Alternatively, a deep neural network can be trained to accurately emulate the complex multi-dimensional input-output relationship of a device, after which a desired functionality is found by gradient descent, with the difference between the actual and the desired input-output relation as cost function [11]. Both approaches are physics agnostic, i.e., they do not assume a specific physical mechanism for the device operation.…”
mentioning
confidence: 99%