A DAG-based design approach for reconfigurable VLIW processors

CHIPS: Custom Hardware Instruction Processor Synthesis

“…Most of the early research and some of the recent work [11]- [16] relied on incremental clustering of related DFG nodes in order to generate a set of custom-instruction templates. Alippi et al [17] introduced the MaxMISO algorithm, which partitions a DFG into maximal-input single-output subgraphs in linear run-time. Binh et al [18] proposed a branch-and-boundbased algorithm for the selection problem in order to minimize the area cost under schedule-length and power-consumption constraints.…”

“…The proposed technique is often limited to DFGs with a few hundred nodes, and the input/output constraints must be tight enough to reduce the exponential worst case time complexity. The work of Atasu et al showed that clustering based approaches (e.g., [14]) or single output operand restriction, (e.g., [17]) could severely reduce the achievable speed-up using custom instructions.…”

“…1) a novel custom-instruction generation technique, which optionally constrains the number of input and output operands for custom instructions and explicitly evaluates the data-transfer costs; 2) an integer-linear-programming (ILP)-based approach, which, unlike previous work [11]- [17] and [22]- [25], does not rely on heuristic clustering algorithms or input/ output constraints for the reduction of the search space; 3) a demonstration that our solutions scale well: basic blocks with more than a thousand instructions can be optimally solved with or without input/output constraints; 4) an evaluation of the impact of area and register-file-port constraints on the execution cycle count and code size for various multimedia and cryptography benchmarks.…”

A Flexible Instruction Generation Framework for Extending Embedded Processors

“…Last years, a number of research efforts have regarded the automated application-specific extension of embedded processors [5]- [9]. A few open instruction generation frameworks exist [10]; an advantage of their work being delivering a format for storing, manipulating and exchanging instruction patterns.…”

“…The method is based on an extension of the MaxMISO algorithm [9], which identifies the maximal non-overlapping connected subgraphs of the DDGs of basic blocks in application programs that produce a single computation result. In this context, two different types of node constraints named node-inclusion and boundary-node constraints are introduced while additional parameterization options of the instruction generation process have been integrated in the algorithm (selectable number of nodes, inputs, arithmetic and other optimizations).…”