A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs

Xin, Xin; Kaps, Jens-Peter; Gaj, Kris

doi:10.1109/dsd.2011.88

Cited by 69 publications

(36 citation statements)

References 12 publications

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“…Their 3-stage configurable RO PUF occupies two Configurable Logic Blocks (CLB) in Xilinx FPGAs; each 3-stage configurable RO occupies a single CLB. Xin et al [15] provides an improvement to this idea by increasing the number of possible configurations to 256 and still using the same number of CLBs.…”

Section: Related Workmentioning

confidence: 98%

A Highly Flexible Ring Oscillator PUF

Gao

Lai

2014

Proceedings of the 51st Annual Design Automation Conference

100

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Physical Unclonable Function (PUF) is one of the most promising hardware features that can be utilized to improve system security. Ring Oscillator (RO) PUF captures the delay difference of a pair or a group of ROs introduced during fabrication process and defines PUF secrecy based on such difference. In this paper, we propose a framework to build RO PUF at inverter level, instead of RO level. This provides us the flexibility in choosing whether an inverter should be included in the RO-PUF and hence improve the security and reliability of RO PUF secrecy and reduce its hardware cost. Experimental results demonstrate that the PUF secrecy generated by our configurable RO PUFs is random (by passing the NIST randomness test) and unique from chip to chip. Our approach is more reliable against voltage and temperature variation than the original RO PUF and is 4X more hardware efficient than the robust 1-out-of-8 RO PUF.

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Section: Related Workmentioning

confidence: 98%

A Highly Flexible Ring Oscillator PUF

Gao

Lai

2014

Proceedings of the 51st Annual Design Automation Conference

100

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“…This delay is the significant and deciding factor in the comparison of two ring oscillators. In [17], the number of configurations of ring oscillator has been improved by introducing a latch in the path of a ring, making it impossible to compare a latch-path with nolatch-path. Our approach is completely different because we do not introduce anything in the path of a ring.…”

Section: Motivation For Fpga Based Pufmentioning

confidence: 99%

FPGA PUF Based on Programmable LUT Delays

Habib

Gaj

Kaps

2013

2013 Euromicro Conference on Digital System Design

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Strong and efficient techniques are required for chip authentication and secret key generation by integrated circuits (IC). This paper presents a novel approach toward an FPGA friendly Ring Oscillator (RO) based Physical Unclonable Function (PUF). In this design the internal variations of FPGA Look-Up Tables are exploited to generate a PUF response. Statistical tests were performed to study the strength of this PUF. Moreover, stability is compared with the state of the art reported in literature to date. Our design has been tested on 31 Spartan-3e devices and the results are promising with inter-device Hamming distance of 48.3%, Uniformity 50.13%, Bit-aliasing 51.8%, Reliability 97.88%, and Steadiness 99.5%. Furthermore, we also analyzed the frequencies to extract the random variation offered by our design.

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“…We use a configurable RO-PUF function with 128 instances of the configurable ring oscillator (RO), each instance contained within a single logic block (CLB), based on the design in [14]. This design allows for accurate reproduction of the hardware signature, since the routing within each RO is completely constrained to the CLB and its associated switch box (interconnect).…”

Section: Case Studymentioning

confidence: 99%

Security aware network controllers for next generation automotive embedded systems

Shreejith

Fahmy

2015

Proceedings of the 52nd Annual Design Automation Conference

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Modern cars incorporate complex distributed computing systems that manage all aspects of vehicle dynamics, comfort, and safety. Increased automation has demanded more complex networking in vehicles, that now contain a hundred or more compute units. As these networks were developed as silos, little attention was given to security early on. However, this has become a key challenge in the automotive domain, as these systems have been shown to be susceptible to various attacks, with sometimes catastrophic consequences. Addressing security in such systems requires consideration of the network and compute units, both hardware and software, and complex real-time constraints. We present an approach that integrates application authentication, message encryption and network access control into a smart network interface, without compromising network determinism. A custom interface with partial reconfiguration support on FPGAs enables seamless integration of security at the interface, offering a level of security not possible with standard layered approaches.

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A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs

Cited by 69 publications

References 12 publications

A Highly Flexible Ring Oscillator PUF

A Highly Flexible Ring Oscillator PUF

FPGA PUF Based on Programmable LUT Delays

Security aware network controllers for next generation automotive embedded systems

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