A biomimetic adaptive algorithm and low-power architecture for implantable neural decoders

Rapoport, Benjamin I.; Wattanapanitch, Woradorn; Penagos, Héctor; Musallam, Sam; Andersen, Richard A.; Sarpeshkar, Rahul

doi:10.1109/iembs.2009.5333793

Cited by 10 publications

(10 citation statements)

References 14 publications

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“…Developing a switching device operating in the mV range, rather than the 1 V range of current transistors, would allow (1 V/1 mV) 2 = 10 6 fold reduction in power consumption (Yablonovitch, 2008). Electronic circuits constructed using analog techniques (Sarpeshkar, 1998), which sometimes rely on bio-inspired computational architectures, show promise for reducing energy costs by up to five orders of magnitude (Sarpeshkar, 1998; Mandal and Sarpeshkar, 2007; Rapoport et al, 2009), depending on the nature of the computation and the required level of precision.…”

Section: Evaluation Of Modalitiesmentioning

confidence: 99%

Physical principles for scalable neural recording

Marblestone

Zamft

Maguire

et al. 2013

Front. Comput. Neurosci.

225

223

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Simultaneously measuring the activities of all neurons in a mammalian brain at millisecond resolution is a challenge beyond the limits of existing techniques in neuroscience. Entirely new approaches may be required, motivating an analysis of the fundamental physical constraints on the problem. We outline the physical principles governing brain activity mapping using optical, electrical, magnetic resonance, and molecular modalities of neural recording. Focusing on the mouse brain, we analyze the scalability of each method, concentrating on the limitations imposed by spatiotemporal resolution, energy dissipation, and volume displacement. Based on this analysis, all existing approaches require orders of magnitude improvement in key parameters. Electrical recording is limited by the low multiplexing capacity of electrodes and their lack of intrinsic spatial resolution, optical methods are constrained by the scattering of visible light in brain tissue, magnetic resonance is hindered by the diffusion and relaxation timescales of water protons, and the implementation of molecular recording is complicated by the stochastic kinetics of enzymes. Understanding the physical limits of brain activity mapping may provide insight into opportunities for novel solutions. For example, unconventional methods for delivering electrodes may enable unprecedented numbers of recording sites, embedded optical devices could allow optical detectors to be placed within a few scattering lengths of the measured neurons, and new classes of molecularly engineered sensors might obviate cumbersome hardware architectures. We also study the physics of powering and communicating with microscale devices embedded in brain tissue and find that, while radio-frequency electromagnetic data transmission suffers from a severe power–bandwidth tradeoff, communication via infrared light or ultrasound may allow high data rates due to the possibility of spatial multiplexing. The use of embedded local recording and wireless data transmission would only be viable, however, given major improvements to the power efficiency of microelectronic devices.

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Section: Evaluation Of Modalitiesmentioning

confidence: 99%

Physical principles for scalable neural recording

Marblestone

Zamft

Maguire

et al. 2013

Front. Comput. Neurosci.

225

223

View full text Add to dashboard Cite

show abstract

“…Impedance-modulation radio-frequency (RF) telemetry techniques can drastically reduce implanted-unit power consumption and operate at less than even for transcutaneous data rates as high as in brain– machine interfaces. Finally, ultra-low-power analog processing techniques [13] , [16] can enable 100-channel neural decoding at micropower levels [17] , [18] and dramatically reduce the data rates needed for communication, further reducing total power consumption. The combination of these advances in energy-efficient amplification, communication, and computation implies that implanted components in brain– machine interfaces that operate with tens of microwatts of total power consumption are feasible today.…”

Section: Introductionmentioning

confidence: 99%

A Glucose Fuel Cell for Implantable Brain–Machine Interfaces

2012

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We have developed an implantable fuel cell that generates power through glucose oxidation, producing steady-state power and up to peak power. The fuel cell is manufactured using a novel approach, employing semiconductor fabrication techniques, and is therefore well suited for manufacture together with integrated circuits on a single silicon wafer. Thus, it can help enable implantable microelectronic systems with long-lifetime power sources that harvest energy from their surrounds. The fuel reactions are mediated by robust, solid state catalysts. Glucose is oxidized at the nanostructured surface of an activated platinum anode. Oxygen is reduced to water at the surface of a self-assembled network of single-walled carbon nanotubes, embedded in a Nafion film that forms the cathode and is exposed to the biological environment. The catalytic electrodes are separated by a Nafion membrane. The availability of fuel cell reactants, oxygen and glucose, only as a mixture in the physiologic environment, has traditionally posed a design challenge: Net current production requires oxidation and reduction to occur separately and selectively at the anode and cathode, respectively, to prevent electrochemical short circuits. Our fuel cell is configured in a half-open geometry that shields the anode while exposing the cathode, resulting in an oxygen gradient that strongly favors oxygen reduction at the cathode. Glucose reaches the shielded anode by diffusing through the nanotube mesh, which does not catalyze glucose oxidation, and the Nafion layers, which are permeable to small neutral and cationic species. We demonstrate computationally that the natural recirculation of cerebrospinal fluid around the human brain theoretically permits glucose energy harvesting at a rate on the order of at least 1 mW with no adverse physiologic effects. Low-power brain–machine interfaces can thus potentially benefit from having their implanted units powered or recharged by glucose fuel cells.

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“…The compression ratio, power consumption, and correlation of decoder output with encoded states and trajectories are relevant measures of performance. In previous work [12] , [13] , we have shown that an implanted neural decoder can compress neural data by a factor of .…”

Section: Introductionmentioning

confidence: 99%

Efficient Universal Computing Architectures for Decoding Neural Activity

et al. 2012

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The ability to decode neural activity into meaningful control signals for prosthetic devices is critical to the development of clinically useful brain– machine interfaces (BMIs). Such systems require input from tens to hundreds of brain-implanted recording electrodes in order to deliver robust and accurate performance; in serving that primary function they should also minimize power dissipation in order to avoid damaging neural tissue; and they should transmit data wirelessly in order to minimize the risk of infection associated with chronic, transcutaneous implants. Electronic architectures for brain– machine interfaces must therefore minimize size and power consumption, while maximizing the ability to compress data to be transmitted over limited-bandwidth wireless channels. Here we present a system of extremely low computational complexity, designed for real-time decoding of neural signals, and suited for highly scalable implantable systems. Our programmable architecture is an explicit implementation of a universal computing machine emulating the dynamics of a network of integrate-and-fire neurons; it requires no arithmetic operations except for counting, and decodes neural signals using only computationally inexpensive logic operations. The simplicity of this architecture does not compromise its ability to compress raw neural data by factors greater than . We describe a set of decoding algorithms based on this computational architecture, one designed to operate within an implanted system, minimizing its power consumption and data transmission bandwidth; and a complementary set of algorithms for learning, programming the decoder, and postprocessing the decoded output, designed to operate in an external, nonimplanted unit. The implementation of the implantable portion is estimated to require fewer than 5000 operations per second. A proof-of-concept, 32-channel field-programmable gate array (FPGA) implementation of this portion is consequently energy efficient. We validate the performance of our overall system by decoding electrophysiologic data from a behaving rodent.

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A biomimetic adaptive algorithm and low-power architecture for implantable neural decoders

Cited by 10 publications

References 14 publications

Physical principles for scalable neural recording

Physical principles for scalable neural recording

A Glucose Fuel Cell for Implantable Brain–Machine Interfaces

Efficient Universal Computing Architectures for Decoding Neural Activity

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