A 7-Tap transverse analog-FIR filter in 0.13μm CMOS for equalization of 10Gb/s fiber-optic data systems

Reynolds, Scott; Pepeljugoski, P.; Schaub, J.D.; Tierno, J.; Beisser, Donald

doi:10.1109/isscc.2005.1494003

Cited by 31 publications

(18 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Gilbert cells are commonly used [9], [14], but they suffer from a few shortcomings. First, although degeneration resistors can be added to increase the linear region of the multiplier, the multiplication step size still exhibits non-uniformity, especially at maximum and minimum gain settings.…”

Section: Multiplier Circuitmentioning

confidence: 99%

An 80 mW 40 Gb/s 7-TapT/2-Spaced Feed-Forward Equalizer in 65 nm CMOS

Momtaz

Green

2010

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

Abstract-A 7-tap 40 Gb/s FFE using a 65 nm standard CMOS process is described. A number of broadbanding and calibration techniques are used, which allow high-speed operation while consuming 80 mW from a 1 V supply. ESD protection is added to 40 Gb/s IOs and an inexpensive plastic package is used to make the chip closer to a commercial product. The measured tap delay frequency response variation is less than 1 dB up to 20 GHz and tap-to-tap delay variation is less than 0.3 ps. More than 50% vertical and 70% horizontal eye opening from a closed input eye are observed. The use of a CMOS process enables further integration of this core into a DFE equalizer or a CDR/Demux based receiver.Index Terms-CMOS analog integrated circuits, current mode logic, FFE, broadband communication, equalizers.

show abstract

Section: Multiplier Circuitmentioning

confidence: 99%

An 80 mW 40 Gb/s 7-TapT/2-Spaced Feed-Forward Equalizer in 65 nm CMOS

Momtaz

Green

2010

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

show abstract

“…with 10 T-spaced feedforward taps and 3 feedback taps is also presented (denoted DFE (10,3)). Recent literature [23] has described analog implementations of 10Gb/s equalizers where the delay line of the adaptive FIR filter is implemented using second order sections as delay elements. The parameters of the second order section are optimized to achieve maximum bandwidth and an approximately linear phase characteristic.…”

Section: Simulation Resultsmentioning

confidence: 99%

SPC03-3: A MIMO-MLSE Receiver for Electronic Dispersion Compensation of Multimode Optical Fibers

et al. 2006

View full text Add to dashboard Cite

In this paper we propose a multiple-input, multiple-output (MIMO) maximum-likelihood sequence estimation (MLSE) receiver for electronic dispersion compensation (EDC) of multimode optical fibers at 10Gb/s data rate. As the primary example of the effectiveness of the techniques introduced here we present a receiver for the emergent 10GBASE-LRM standard for 10Gb/s Ethernet over multimode optical fibers [1]. We show that an MLSE receiver provides an advantage of at least 2dB over other receivers, such as the decision-feedback equalizer (DFE), on 99% of the local area network (LAN) multimode fiber population, as modeled by a database proposed by the IEEE 802.3aq Task Force [2]. The paper deals with both theoretical and practical aspects of the architecture. To enable the complete integration of this receiver as a single chip in current 90nm CMOS technology, we propose the parallel-processing digital implementation of a feedforward equalizer (FFE) and a Viterbi decoder together with an interleaved front-end analog to digital converter (ADC). The MIMO structure jointly compensates for fundamental channel impairments such as multimode dispersion, and implementation-related effects such as the limitations of the analog front end (AFE), particularly the one known as fixedpattern noise (FPN) [3]. As a result of the high speed operation, FPN has a major impact on performance. We show that, without compensation, FPN could result in a degradation of 7.86dB. With the compensation proposed here, the latter is reduced to 0.23dB.

show abstract

“…Disadvantages of predistortion are the required knowledge at the transmitter side about the channel characteristics as well as increased high-frequency signal power at the transmitter that potentially couples to other channels. Equalizers for optical systems often employ relatively long FIR-filters in the receiver, mostly implemented with power-and areaintensive full-rate buffered LC-delay lines [4]. In contrast, heavy 8-fold interleaving is used in the 4-tap discrete-time FIR-only backplane receive equalizer presented in [5].…”

Section: Introductionmentioning

confidence: 99%

Sampling Receive Equalizer with Bit-Rate Flexible Operation up to 10 Gbit/s

Philipp

Neher

Berroth

2006

2006 Proceedings of the 32nd European Solid-State Circuits Conference

View full text Add to dashboard Cite

A receive equalizer IC implemented in 0.13 µm standard CMOS technology is presented. The equalizer filter works with sampled analog signals within a half-rate architecture. Due to its discrete-time nature, the circuit operates continuously on bit rates ranging from 0.5 Gbit/s to 10 Gbit/s. The equalizer core consists of a 3-tap finite-impulseresponse filter and a subsequent decision-feedback filter with first and second post cursor feedback taps. Up to 24 dB channel loss at the Nyquist frequency can be compensated. The reception of a 2 31 -1 PRBS binary data stream transmitted over a 90 cm long trace on FR4 with 10 Gbit/s and over a 173 cm long trace with 7 Gbit/s with a BER < 10 -12 and receive-only equalization is presented. The power consumption of the equalizer core is 21 mW and the core area is 60 µm x 56 µm.

show abstract

A 7-Tap transverse analog-FIR filter in 0.13μm CMOS for equalization of 10Gb/s fiber-optic data systems

Cited by 31 publications

References 2 publications

An 80 mW 40 Gb/s 7-TapT/2-Spaced Feed-Forward Equalizer in 65 nm CMOS

An 80 mW 40 Gb/s 7-TapT/2-Spaced Feed-Forward Equalizer in 65 nm CMOS

SPC03-3: A MIMO-MLSE Receiver for Electronic Dispersion Compensation of Multimode Optical Fibers

Sampling Receive Equalizer with Bit-Rate Flexible Operation up to 10 Gbit/s

Contact Info

Product

Resources

About