A 6 GHz 160 MHz Bandwidth MU-MIMO Eight-Element Direct Digital Beamforming TX Utilizing FIR H-bridge DAC

Zheng, Boyi; Lü, Jie; Wang, Runyu; Flynn, Michael P.

doi:10.1109/rfic49505.2020.9218294

Cited by 4 publications

(2 citation statements)

References 4 publications

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“…A performance summary and comparison with relevant stateof-the-art phased-array transmitters are shown in Table IV. Comparing to the counterparts [9], [10], [17], [22], and [25], our phased-array TX achieves better rms phase and gain error with the highest phase resolution of 0.35 • , highest system efficiency, higher data rate, and wider operation bandwidth.…”

Section: B Array Characterizationsmentioning

confidence: 94%

“…Radio frequency (RF) phase-shifting [2]- [10], local oscillator (LO) phase-shifting [11]- [18], intermediate frequency (IF) phase-shifting, and baseband (BB) phase-shifting topologies [19]- [25] are conventional phased-array architectures with phase shifters in RF, LO, IF, and BB paths, respectively. For architectures with phase shifters in signal path (i.e., RF and IF phase-shifting), the system linearity and amplitude variation are affected by phase shifters significantly.…”

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confidence: 99%

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A 4-Element Digital Modulated Polar Phased-Array Transmitter With Phase Modulation Phase-Shifting

Qian

Zhou

Yang

et al. 2021

IEEE J. Solid-State Circuits

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A novel architecture of a digital modulated polar phased-array transmitter with phase modulation (PM) phase-shifting and feed-forward controlled dynamic matching (FFCDM) is presented in this article. Phase-shifting in a PM signal path is utilized in each element, which shares many components including a phase modulator, baseband, and IF components. The characteristics of the proposed architecture are analyzed. With a constant envelope of PM signals, the implicit nonlinearity of the phase shifter in this architecture has low impact on the linearity performance of a phased-array system. Meanwhile, low phase error can be achieved by high-resolution phase interpolation with the digital predistortion (DPD) technique. Efficiency for both saturated and 6-dB back-off power is enhanced by digital power amplifier (DPA) with FFCDM. As a proof of concept, a 3-7 GHz 4-element phased-array transmitter is designed and fabricated in 40-nm CMOS based on the proposed method. The measured root-mean-square (rms) phase error of 0.3 • , effective phase shifting resolution of 9-bit, and peak system efficiency of 38.2% are achieved. For 40 MHz 64-QAM modulation signal, it exhibits EVM of 5.38% and 5.37%, P out of 14.30 and 14.46 dBm, and PAPR of 7.08 and 6.97 at 3.5 and 5.2 GHz, respectively. The measured peak EIRP is 35.6 dBm with a unit antenna gain of 2.98 dBi at 5 GHz. The radiation patterns with 0 • , 15 • , 30 • , and 45 • steering are measured based on monopole antennas. Meanwhile, the array achieves <4.7% and <5.9% EVM for 64-QAM signals with bandwidths of 20 and 40 MHz, respectively.

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