A 6.42 mW low-power feed-forward FxLMS ANC VLSI design for in-ear headphones

Abstract

Conventional active noise cancellation (ANC) applications often use high-speed digital signal processors (DSPs) to cancel annoying noise, which result in an expensive cost and high-power dissipation for modern portable devices. To achieve both high-performance and low-power consumption requirements, this paper proposes a dedicated feed-forward filtered-x least mean square (FxLMS) ANC VLSI design for inear headphones. The validity of the proposed design is then verified through adopting experiments in an anechoic chamber. Experimental results show that the proposed design can attenuate 15 dB for broadband pink noise with a bandwidth of 50-1500 Hz when operated at 10 MHz clock frequency, at the costs of 84.2 k gates and power consumption of 6.42 mW only. Keywords-in-ear headphone, active noise cancellation, feedforward FxLMS, VLSI design.978-1-4799-8391-9/15/$31.00 ©2015 IEEE

Audio Denoising Coprocessor Based on RISC-V Custom Instruction Set Extension

“…Using FPGAs as the hardware of ANC algorithms significantly improves the computing capacity, but the flexibility of the algorithms is sharply reduced because the hardware design forces the algorithms to redesign the hardware logic for a slight change. In addition, application-specific integrated circuit (ASIC) [6] and analog circuit [7] are used to realize the ANC system, but the overall effect is not as good as the mainstream DSP or FPGA. Therefore, a new design with the advantages of both DSPs and FPGAs was developed; that is, a combination of RISC-V soft core with a dedicated hardware accelerator.…”