1981
DOI: 10.1109/isscc.1981.1156231
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T. Sakai, Y. Yamamoto, Y. Kobayashi, K. Kawarada, Y. Inabe

Abstract: A STATIC BIPOLAR 256x4b ECL RAM with a typical access time of 2.7ns and power dissipation of 500mW will be reported. This performance has been achieved by using a Super Self-aligned process Technology (SST), together with a reference circuit configuration. The SST is a family of technologies in which the selfaligned process is fully utilized. Onc approach for SST1, only one mask is needed to process the transistor activc region, including submicron-width base electrode and cmittcr contact windows'. Figure 1 i…

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