A 250 mV Cu/SiO₂/W Memristor with Half-Integer Quantum Conductance States

Abstract

Memristive devices, whose conductance depends on previous programming history, are of significant interest for building nonvolatile memory and brain-inspired computing systems. Here, we report half-integer quantized conductance transitions G = (n/2) (2e(2)/h) for n = 1, 2, 3, etc., in Cu/SiO2/W memristive devices observed below 300 mV at room temperature. This is attributed to the nanoscale filamentary nature of Cu conductance pathways formed inside SiO2. Retention measurements also show spontaneous filament decay with quantized conductance levels. Numerical simulations shed light into the dynamics underlying the data retention loss mechanisms and provide new insights into the nanoscale physics of memristive devices and trade-offs involved in engineering them for computational applications.

Recent Advances of Quantum Conductance in Memristors

“…[14,33,70] In this case, charge carriers can move through these quasi-1D systems ballistically without any scattering, which makes the device conductance to closely depend on the size of the atomic point contacts and thus to be quantized in the unit of G 0 = 2e 2 /h (where e is the electron charge and h is the Planck's constant). [14,33,70] In this case, charge carriers can move through these quasi-1D systems ballistically without any scattering, which makes the device conductance to closely depend on the size of the atomic point contacts and thus to be quantized in the unit of G 0 = 2e 2 /h (where e is the electron charge and h is the Planck's constant).…”

“…Among them, one representative is the n-Si/SiO x /p-Si memristor with statistical conductance peaks from 0.5 to 4.5G 0 with the interval of 0.5G 0 (Figure 5e). [70,74] Unexpectedly, [71] Copyright 2015, The authors, published by Springer. Moreover, it is noteworthy that a low voltage sweeping rate to slow down the size evolution process of conducting filaments is usually necessary to observe quantum conductance in memristors.…”

“…For example, Nandakumar et al [70] tested the Cu/SiO 2 /W memristor by using a current sweep from 0 to 100 µA with a fixed, small sweeping rate of 200 nA/10 ms. For example, Nandakumar et al [70] tested the Cu/SiO 2 /W memristor by using a current sweep from 0 to 100 µA with a fixed, small sweeping rate of 200 nA/10 ms.…”

“…2019, 5, 1800854 Figure 9. [70] Copyright 2016, American Chemical Society. a) The dependence of sub-bands structure on filament size.…”

“…Given that quantum conductance in the n-Si/SiO x /p-Si memristor occurs at very high voltage region (>5 V), half-integer quantum conductance levels are thus attributed to a large Δµ caused by the high voltage bias across the device. [70] To explain this, Nandakumar et al [70] described the current through the nano constriction to be However, half-integer quantum conductance levels have actually been reported in several memristors with metal filaments, such as Ag/P3HT:PCBM/ ITO [39] and Cu/SiO 2 /W.…”