7.7 A 768Gb 3b/cell 3D-floating-gate NAND flash memory

Tanaka, Tomoharu; Helm, Mark; Vali, Tommaso; Ghodsi, R.; Kawai, Koichi; Park, Jaekwan; Yamada, Shigekazu; Pan, Feng; Einaga, Yuichi; Ghalam, Ali; Tanzawa, Toru; Guo, J.; Ichikawa, Takaaki; Yu, Erwin; Tamada, Satoru; Manabe, Tetsuji; Kishimoto, J.; Oikawa, Yoko; Takashima, Yasuhiro; Kuge, Hidehiko; Morooka, Midori; Mohammadzadeh, Ali; Kang, Jong Hoon; Tsai, Jeff; Sirizotti, E.; Lee, Eric; Vu, Luyen; Liu, Yuxing; Choi, Hoon; Cheon, Kwonsu; Song, Daesik; Shin, Dongsuk D.; Yun, Jung Hee; Piccardi, Michele; Chan, Kim-Fung; Luthra, Yogesh; Srinivasan, Dheeraj; Deshmukh, Srinivasarao; Kavalipurapu, Kalyan; Nguyen, Dan T.; Gallo, Girolamo; Ramprasad, S.; Luo, Michelle; Tang, Qiang; Incarnati, Michele; Macerola, A.; Pilolli, L.; Santis, Luca De; Rossini, Massimo; Moschiano, Violante; Santin, G.; Tronca, Bernardino; Lee, Hyunseok; Patel, Vaama; Pekny, Ted; Yip, Aaron; Prabhu, Naveen; Sule, Purval; Bemalkhedkar, Trupti; Upadhyayula, Kiranmayee; Jaramillo, Camila

doi:10.1109/isscc.2016.7417947

Cited by 59 publications

(24 citation statements)

References 4 publications

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“…In this Section, we will mainly focus our attention on the most promising 3D NAND architecture, i.e., the one based on vertical strings of cells and parallel planes connecting the control gates [23][24][25].…”

Section: D Nand Reliabilitymentioning

confidence: 99%

“…Such a device was shown to exhibit superior performance with respect to a conventional vertical nanowire transistor, because of the high defectivity in the central region that plagued the performance of the latter structure. The gate stack of today's 3D NAND can be based on either a floating gate [23,[287][288][289][290][291], similar to planar NAND devices, or a charge-trap stack similar to an oxide/nitride/oxide (ONO) layer, where the charge is stored in traps within the nitride layer [10,11,22,292].…”

Section: D Nand Reliabilitymentioning

confidence: 99%

“…In this field, a pioneering proposal was put forward in 2001 [16], evolving into early proposals based on layer stacking [17][18][19] and reaching the first cost-effective solution of a 3D-integrated array in 2007 [20]. From there on, 3D NAND based on vertical channels have taken the lead in the quest for higher density, resulting in the first commercial product in 2013 [21,22] and reaching a capacity of 786 Gb with a density of 4.29 Gb/mm 2 [23] while stacking up to 64 layers [23][24][25]. Chip capacity was boosted not only by 3D integration, but also by multi-bit storage: while two bit-per-cell (i.e., multi-level cells, MLCs) were used in the first prototype [21], today's technology relies on storing three bit-per-cell (triple-level cells or TLCs) and quadruple-level cells (QLCs) are under active development.…”

Section: Introductionmentioning

confidence: 99%

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Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

2017

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Abstract:We review the state-of-the-art in the understanding of planar NAND Flash memory reliability and discuss how the recent move to three-dimensional (3D) devices has affected this field. Particular emphasis is placed on mechanisms developing along the lifetime of the memory array, as opposed to time-zero or technological issues, and the viewpoint is focused on the understanding of the root causes. The impressive amount of published work demonstrates that Flash reliability is a complex yet well-understood field, where nonetheless tighter and tighter constraints are set by device scaling. Three-dimensional NAND have offset the traditional scaling scenario, leading to an improvement in performance and reliability while raising new issues to be dealt with, determined by the newer and more complex cell and array architectures as well as operation modes. A thorough understanding of the complex phenomena involved in the operation and reliability of NAND cells remains vital for the development of future technology nodes.

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Section: D Nand Reliabilitymentioning

confidence: 99%

Section: D Nand Reliabilitymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

2017

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“…A FG vertical cell is also proposed, with several options [20][21][22][23]. The reasons for pursuing a FG structure in 3D NAND are due to the advantages of FG versus CT cells and the industry's familiarity with the former in terms of 2D NAND history.…”

Section: The Floating-gate Cell Architecturesmentioning

confidence: 99%

3D NAND Flash Based on Planar Cells

Silvagni¹

2017

Computers

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Abstract:In this article, the transition from 2D NAND to 3D NAND is first addressed, and the various 3D NAND architectures are compared. The article carries out a comparison of 3D NAND architectures that are based on a "punch-and-plug" process-with gate-all-around (GAA) cell devices-against architectures that are based on planar cell devices. The differences and similarities between the two classes of architectures are highlighted. The differences between architectures using floating-gate (FG) and charge-trap (CT) devices are also considered. Although the current production of 3D NAND is based on GAA cell devices, it is suggested that architectures with planar cell devices could also be viable for mass production.

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“…Most architectures presented so far rely on CT cells, although there are some exceptions like FG-based 3D NAND Flash architectures [5,6].…”

Section: Introductionmentioning

confidence: 99%

Architectural and Integration Options for 3D NAND Flash Memories

Micheloni

Crippa²,

Zambelli

et al. 2017

Computers

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Nowadays, NAND Flash technology is everywhere, since it is the core of the code and data storage in mobile and embedded applications; moreover, its market share is exploding with Solid-State-Drives (SSDs), which are replacing Hard Disk Drives (HDDs) in consumer and enterprise scenarios. To keep the evolutionary pace of the technology, NAND Flash must scale aggressively in terms of bit cost. When approaching ultra-scaled technologies, planar NAND is hitting a wall: both academia researchers and industry worked to cope with this issue for several decades. Then, the 3D integration approach turned out to be the definitive alternative by eventually reaching mass production. This review paper exposes several 3D NAND Flash memory technologies, along with their related integration challenges, by showing their different layouts, scaling trends and performance/reliability features.

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7.7 A 768Gb 3b/cell 3D-floating-gate NAND flash memory

Cited by 59 publications

References 4 publications

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

3D NAND Flash Based on Planar Cells

Architectural and Integration Options for 3D NAND Flash Memories

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