22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS

Abstract

Silicon photonic microring modulators (MRMs) offer a promising approach for realizing energy-efficient wavelength-division multiplexing (WDM) optical interconnects. For data-rates greater than 10Gb/s, depletion-mode MRMs are generally preferred over their injection-mode counterparts due to their shorter carrier lifetimes and resulting higher bandwidths. Unfortunately, these depletion-mode MRMs typically exhibit low PN junction tunability, thereby requiring higher modulation voltages in order to provide >6dB extinction ratios (ER). Furthermore, negative DC-biasing of the MRMs is necessary to maintain reverse-biased depletion-mode operation. In this work, a 5×25Gb/s hybridintegrated MRM WDM transmitter is demonstrated that incorporates the following key advances: 1) an AC-coupled differential output driver that applies a 4.4V pp-diff output-swing on the MRM while providing a tunable on-chip negative DC-bias; 2) a 2-tap non-linear digital FFE that compensates for opticaldynamics-induced bandwidth limitations; 3) a dynamic thermal tuning loop that stabilizes the MRM by minimizing thermally-induced wavelength fluctuations.As seen in Fig. 22.6.1, wire-bonding-based hybrid integration provides a low-cost approach for Si-photonic systems with a moderate number of pads. The Si-photonic WDM chip in this work consists of 8 common bus MRMs [1], with 5 of them wire-bonded to the CMOS transmitter IC. The measured DC ring spectrum data of the MRMs, which have a 7.5μm radius and ~5000 quality factor, shows that 4V swing is required to achieve >7dB extinction ratio. One potential approach to achieve this large swing amplitude involves the use of differential pulsed-cascode output stages using thin-oxide transistors [3,4], which can achieve 2×DVDD swing per-terminal, or an effective 4×DVDD differential swing on the modulator. However, DC-coupled differential drivers can provide only a 0V DC-bias, which conflicts with the negative-bias requirement for depletion-mode operation. While adding negative supply voltages can provide fixed DC-biases for the differential outputs [2], the number of power-supply domains will increase. In this work, an AC-coupled differential output stage is developed that enables 4×DVDD swing together with a tunable negative DC-bias. Figure 22.6.1 shows the on-chip DC-blocking capacitor C C and DC-bias resistor R B , implemented with the pulsed-cascode output stages to decouple the high-frequency modulation from the DC-bias voltages. The insertion loss of the driver passive network is designed to be <1dB between 0.1 and 20GHz, to minimize signal-integrity degradation and achieve ~4.4V pp-diff effective output swing from a 1.2V DVDD supply. Figure 22.6.2 shows the block diagram of the 5-channel transmitter array. A half-rate global clock is distributed through an on-chip transmission line and locally recovered by per-channel CML-to-CMOS converters. 8-to-1 data serialization is achieved using three stages of CMOS MUXs. In conventional high-speed 2-to-1 MUX designs, retiming latches are used to introduce 1-UI de...

Silicon-Photonics Microring Links for Datacenters—Challenges and Opportunities

“…After separating the modulated optical signals based on their wavelengths, PDs are used to detect each of the incoming signals. It has already been shown that MRR-based links are capable of operating at an excess of 25 Gb/s per wavelength [30], [53], [54], implying that a 25 Gb/s lane could be replicated as many times as needed to reach the aggregate goal. To relax the RX front-end design requirements to attain a 100 Gb/s throughput and beyond, the multiplexing factor (number of wavelengths, n) can theoretically be increased to a large extent [3].…”

Energy efficiency comparisons of NRZ and PAM4 modulation for ring-resonator-based silicon photonic links

“…Fig. 2(a) shows a differential cascode modulator driver capable of outputting NRZ modulation with 4.8Vpp-diff swing when implemented in a 1.2V 65nm CMOS technology [6]. At each side of the differential driver is a cascode output stage powered by a supply that is twice the nominal CMOS supply, allowing a 2.4V swing per modulator terminal in the 65nm node without transistor overstress.…”

“…Ring modulator transmission curves are shown in Fig. 5, with a maximum 4.4Vpp-diff swing considered due to the capacitive voltage division associated with the AC-coupling that maintains reverse-bias operation [6]. The total modulator nonlinearity due to the voltage-to-index and index-to-intensity responses must be considered for uniform PAM4 level spacing, with the input laser wavelength optimized separately for the single and two-segment devices.…”

Modeling of Silicon Photonic Devices for Optical Interconnect Transceiver Circuit Design

“…At data rates near 10 Gb/s, injection-mode modulators based on forward-biased p-i-n junctions are an attractive device due to their high modulation depths and rapid bias-based resonance wavelength tuning capabilities [6,7], but their speed with simple non-return-to-zero (NRZ) modulation is limited by both long minority carrier lifetimes and series resistance effects [8]. Depletion-mode modulators based on reverse-biased p-n junctions can achieve high speed (~40 Gb/s) [9], but require large drive voltages [10]. Injection-mode modulators provide higher energy efficiency and depletion-mode modulators offer higher bandwidth density.…”