2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2014
DOI: 10.1109/isscc.2014.6757428
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Abstract: Phase-locked loops (PLLs) are widely used for clock generation in modern digital systems. All-digital PLLs have been proposed to address design issues in conventional analog PLLs. However, current all-digital PLLs require custom circuit design, and therefore cannot fully leverage advanced automated digital design flows. While fully synthesizable PLLs [1,2,3] have been reported, they suffer from high power consumption and large area. This arises because each stage of the ring needs to have a large number of par… Show more

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Cited by 40 publications
(37 citation statements)
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“…8). This work with all-synthesizable PLLs with single-phase output demonstrates lower jitter and smaller size except [6], which uses injection locking.…”
Section: Measurement Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…8). This work with all-synthesizable PLLs with single-phase output demonstrates lower jitter and smaller size except [6], which uses injection locking.…”
Section: Measurement Resultsmentioning
confidence: 99%
“…Meanwhile, PLLs are used as a components in large digital chips such as central processing units and digital signal processors; the digital chip is mostly implemented by using logic synthesis to enhance the portability between different process technologies. All-synthesizable PLLs are developed to follow this trend [5][6][7][8]. However, all these PLLs generate a single output clock.…”
Section: Introductionmentioning
confidence: 99%
“…Since PLL can be designed in digital domain, a fully synthesizable PLL based solely on a standard digital library is proposed [41]. The digital control of the oscillator is the key technique to implement a synthesizable digital PLL, thus a current-output digital-to-analog converter and interpolative phase-coupled oscillator as well as an edge injection technique are designed as shown in Fig.…”
Section: Synthesizable All-digital Pllmentioning
confidence: 99%
“…For a further digitization, some synthesizable analog circuits have been reported such as synthesizable PLL [31], [32] and synthesizable ADC [33].…”
Section: Digitally-synthesizable Analog Circuitsmentioning
confidence: 99%
“…To achieve high performance by a synthesizable analog circuit, a synthesisfriendly architecture has to be developed. As an example of synthesis-friendly PLL, an injection-lock-based PLL is introduced below [31], [32].…”
Section: Digitally-synthesizable Analog Circuitsmentioning
confidence: 99%