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Cited by 14 publications
(7 citation statements)
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References 6 publications
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“…They account for the up-conversion of the low frequency noise only and not for the phase noise floor. It is worth citing here that, for an oscillation frequency of about 13 GHz, quite close the 15 GHz addressed in the present work, a phase noise floor of −145 dBc/Hz was reported for a 40 nm CMOS VCO working at 3.5 K [28].…”
Section: Voltage Controlled Oscillator: Design and Modelingsupporting
confidence: 81%
See 1 more Smart Citation
“…They account for the up-conversion of the low frequency noise only and not for the phase noise floor. It is worth citing here that, for an oscillation frequency of about 13 GHz, quite close the 15 GHz addressed in the present work, a phase noise floor of −145 dBc/Hz was reported for a 40 nm CMOS VCO working at 3.5 K [28].…”
Section: Voltage Controlled Oscillator: Design and Modelingsupporting
confidence: 81%
“…Currently, the silicon foundries usually release DK in the −50 • C to +80 • C temperature range. The actual praxis is therefore designing the RFICs at room temperature by using a standard process and then cooling down the prototypes to cryogenic temperatures for its characterization [27,28]. As the cooling down from 300 K to a cryogenic temperature may induce a frequency mismatch between the VCO and the Frequency Divider, the RFICs are designed with generous tolerances and tuning capabilities, entailing a sub-optimized design.…”
Section: Pll/plo and Quantum Microprocessorsmentioning
confidence: 99%
“…The junction geometry opens space between modules to route the gate lines and/or to place cryogenic classical electronics in the quantum processor plane [10,34]. Fabricating the qubits and the classical control layer using the same technology is appealing because it will facilitate the integration process, improving feedback speeds in error-correction protocols, and offer potential solutions to wiring and layout challenges [7,[77][78][79][80][81]. Integrating classical and quantum devices monolithically, using CMOS processes, enables the quantum processor to profit from the most mature industrial technology for the fabrication of large-scale circuits [35].…”
Section: Discussionmentioning
confidence: 99%
“…On the other hand, less progress and complexity have been shown in the literature on the spin qubit readout side, thus resulting in a cryogenic CMOS chip integrating quantum dots and electronic circuits at 100 mK [12], but without advanced multiplexing and scaling features. Recently, however, receivers for qubit readout have been concurrently reported [13]- [15]. In order to address this gap with the realization of a fully-integrated scalable readout system, this article describes in detail the first fully-integrated cryo-CMOS system-on-chip (SoC) with in-phase/quadrature (I /Q) receiver and frequency synthesizer [13] for scalable, multiplexed radio frequency (RF) dispersive readout of silicon qubits in quantum dots.…”
Section: Introductionmentioning
confidence: 99%