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This paper proposes an improved analytical stray capacitance model for inductors. It considers the capacitances between the winding and the central limb, side limb, and yoke of the core. The latter two account for a significant proportion of the total capacitance with the increase of the core window utilization factor. The potential of the floating core/shield is derived analytically, which enables the model to apply not only for the grounded core/shield, but also for the floating core/shield cases. Based on the improved model, an analytical optimization method for the stray capacitance in inductors is proposed. Moreover, a global Pareto optimization is carried out to identify the trade-offs between the stray capacitance and ac resistance in the winding design. Finally, the analysis and design are verified by finite element method (FEM) simulations and experimental results on a 100 kHz dual active bridge (DAB) converter.

Microgrid with integrated photo-voltaics (PV) and battery storage system (BSS) is a promising technology for future residential applications. Optimally sizing the PV system and BSS can maximise self-sufficiency, grid relief, and at the same time can be cost-effective by exploiting tariff incentives. To that end, this paper presents a comprehensive optimisation model for the sizing of PV, battery, and grid converter for a microgrid system considering multiple objectives like energy autonomy, power autonomy, payback period, and capital costs. The proposed approach involves developing a holistic technoeconomic microgrid model based on variables like PV system power, azimuth angle, battery size, converter ratings, capital investment and electricity tariffs. The proposed method is applied to determine the optimum capacity of a PV system and BSS for two case residential load profiles in the Netherlands and Texas, US to investigate the effect of meteorological conditions on the relative size of PV and battery. Based on the optimisation results, thumb rules for optimal system sizing are derived to facilitate microgrid design engineers during the initial design phase.

With growing concern on climate change, widespread adoption of electric vehicles (EVs) is important. One of the main barriers to EV acceptance is range anxiety, which can be alleviated by fast charging (FC). The main technology constraints for enabling FC consist of high-charging-rate batteries, high-power-charging infrastructure, and grid impacts. Although these technical aspects have been studied in literature individually, there is no comprehensive review on FC involving all the perspectives. Moreover, the power quality (PQ) problems of fast charging stations (FCSs) and the mitigation of these problems are not clearly summarized in the literature. In this paper, the state-of-the-art technology, standards for FC (CHAdeMO, GB/T, CCS, and Tesla), power quality issues, IEEE and IEC PQ standards, and mitigation measures of FCSs are systematically reviewed. Index Terms-Charging stations, Electric vehicles, Power quality, Power system stability I. INTRODUCTION G ROWING concern about climate change intensifies the trend towards decarbonization and interest in clean technology. As a substitute for internal combustion engine vehicles (ICEVs), EVs powered by renewable electricity, can reduce petroleum usage and greenhouse emission [1], [2]. Besides, new technologies on the powertrain of EVs, e.g., wide-bandgap-component based motor drive that improves battery-towheel efficiency [3], make EVs more competitive on energy saving. The convenience of EV recharging significantly influences EV adoption and utilization. The charging power level is generally categorized into two classes-the slow charging and the FC. Typically, the former signifies the distributed charging at home, and public destinations, with the power rated lower than the maximum household power (e.g., 22 kW in European Union and 19kW in the United States [4]). On the contrary, fast chargers have a higher power rating and are typically used in FCSs. The charging modes are standardized in IEC 61851-1 [5] and SAE J1772 [1], according to the type of the input current (AC or DC) and the power level. In IEC 61851-1, four charging modes are defined, where Mode 1, 2, and 3 are the AC charging mode and Mode 4 is DC charging mode. Moreover, only Mode 3 and 4 support the FC. In SAE J1772, the EV charging is classified as three levels, where Level 1 and 2 are the slow charging via AC on-board chargers (OBCs), and Level 3 is the FC via DC off-board charger. Due to the space and weight constraints of the AC OBC, it has a limited maximum power rating, e.g., 43 kW for Mode 3 in IEC 61851-1. Thus, the mainstream FC is through the DC This project has received funding from the Electronic Components and Systems for European Leadership Joint Undertaking under grant agreement No 876868. This Joint Undertaking receives support from the European Union's Horizon 2020 research and innovation programme and Germany,

The inherent double line ripple power in single-phase systems is adverse to the performance of power electronics converters, e.g. limited lifetime due to the requirement of large electrolytic capacitors and low voltage control bandwidth due to harmonic disturbance. In this paper, an active converter topology based on a symmetrical half bridge circuit is proposed to decouple the ripple power so that balanced instantaneous power flow is assured between source and load, and the required dc-link capacitance can be dramatically reduced. For proper closed-loop regulation, the small signal modeling of the proposed system is presented, and a dual voltage control strategy is then proposed, which comprises one voltage loop implemented in the synchronous reference frame for active power balancing, and another one implemented in the stationary reference frame for ripple power compensation. Special attention is given to the bandwidth of voltage control loops because the variation of dc-link voltage should be kept within an acceptable range during load transients. This is particularly important for systems with reduced dclink capacitance because they are of lower energy capacity and the dc-link voltage is therefore very sensitive to step load changes. Comprehensive simulation and experimental results are presented to show the effectiveness of the proposed circuit and control algorithm.Index Terms-Active power decoupling, capacitance reduction, single-phase systems, voltage control.I.

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