The feasibility of measuring overlay using small targets has been demonstrated in an earlier paper 1 . If the target is small ("smallness" being relative to the resolution of the imaging tool) then only the symmetry of its image changes with overlay offset. For our purposes the targets must be less than 5µm across, but ideally much smaller, so that they can be positioned within the active areas of real devices. These targets allow overlay variation to be tested in ways that are not possible using larger conventional target designs. In this paper we describe continued development of this technology.In our previous experimental work the targets were limited to relatively large sizes (3x3µm) by the available process tools. In this paper we report experimental results from smaller targets (down to 1x1µm) fabricated using an e-beam writer.We compare experimental results for the change of image asymmetry of these targets with overlay offset and with modeled simulations. The image of the targets depends on film properties and their design should be optimized to provide the maximum variation of image symmetry with overlay offset. Implementation of this technology on product wafers will be simplified by using an image model to optimize the target design for specific process layers. Our results show the necessary good agreement between experimental data and the model.The determination of asymmetry from the images of targets as small as 1µm allows the measurement of overlay with total measurement uncertainty as low as 2nm.
We have demonstrated the feasibility of measuring overlay using small targets with an optical imaging tool in earlier papers 1,2 . For 3µm or smaller targets, overlay shifts introduce asymmetry into the target image. The image asymmetry is proportional to the overlay shift and so this effect can be used to measure the overlay.We have used wafers built using production 45nm and 55nm processes to test these targets in production control situations. Targets with different programmed offsets allow the necessary conversion between image asymmetry and overlay shift to be determined empirically on the wafer under test. Measurements made using standard 25µm bar-inbar targets and 3µm in-chip targets agree to within 10nm (3σ). By processing results from five or more fields the agreement is improved to 5nm, a level which is limited by a mechanism other than random errors and which is similar to differences between different styles of bar-in-bar targets.Analysis of data from both in-chip and bar-in-bar targets shows similar patterns of overlay variation within the device area. The pattern of overlay variation does not fit mathematical models of overlay as a function of location. The total change of overlay within the field is 10nm, exceeds the overlay budget for critical layers at 45nm design rules 3 . This uncontrolled in-field variation in overlay must be reduced and ideally eliminated if process control is to be achieved. A first step in controlling these errors is having an ability to measure them, and our data shows that this is possible with targets no larger than 3µm in total size.
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