Ternary content-addressable memories (TCAMs) may be used to obtain a simple and very fast implementation of a router's forwarding engine. The applicability of TCAMs is, however, limited by their size and high power requirement. Zane et al.[1] proposed a method and associated algorithms to reduce the power needed to search a forwarding table using a TCAM. We improve on both the algorithms proposed by them. Additionally, we show how to couple TCAMs and high bandwidth SRAMs so as to overcome both the power and size limitations of a pure TCAM forwarding engine.
Abstract-In this paper, we propose a novel supernode caching scheme to reduce IP lookup latencies and energy consumption in network processors. In stead of using an expensive TCAM based scheme, we implement a set associative SRAM based cache. We organize the IP routing table as a supernode tree (a tree bitmap structure) [5]. We add a small supernode cache in-between the processor and the low level memory containing the IP routing table in a tree structure. The supernode cache stores recently visited supernodes of the longest matched prefixes in the IP routing tree. A supernode hitting in the cache reduces the number of accesses to the low level memory, leading to a fast IP lookup. According to our simulations, up to 72% memory accesses can be avoided by a 128KB supernode cache for the selected three trace files. Average supernode cache miss ratio is as low as 4%. Compared to a TCAM with the same size, 77% of energy consumption can be reduced.
Ternary content-addressable memories (TCAMs) may be used to obtain a simple and very fast implementation of a router's forwarding engine. The applicability of TCAMs is, however, limited by their size and high power requirement. Zane et al. proposed a method and associated algorithms to reduce the power needed to search a forwarding table using a TCAM. We improve on both the algorithms proposed by them. Additionally, we show how to couple TCAMs and high-bandwidth SRAMs so as to overcome both the power and size limitations of a pure TCAM forwarding engine. By using one of our novel TCAM-SRAM coupling schemes (M-12 Wb), we are able to reduce TCAM memory by a factor of about 5 on IPv4 data sets and by a factor of about 2.5 on IPv6 data sets; TCAM power requirement is reduced by a factor of about 10 on IPv4 data sets and by a factor of about 6 on IPv6 data sets. These comparisons are with respect to the improved TCAM algorithms we have developed for the strategies of Zane et al. The stated improvements come at the cost of increasing SRAM requirement by a factor 2.5 for IPv4 data and a factor of 5 for IPv6 data. This cost is unimportant given that SRAMs are relatively quite cheap and have much less power requirement. For another of our novel TCAM-SRAM coupling schemes (1-12Wc), the TCAM memory and power reduced by factors of about 4 and 12 for IPv4 data sets, respectively, and by factors of about 2 and 10 for IPv6 data sets. The SRAM required, however, increased by factors of 3 and 7, respectively. These improvements come with no loss in the time (as measured by the number of TCAM searches and SRAM accesses) to do a lookup.Index Terms-Low power, packet forwarding, SRAM, table partitioning, ternary content-addressable memory (TCAM).
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