A new AMOLED pixel circuit was proposed to compensate for the mismatched combination of n‐type TFT and normal bottom‐emission OLED. The proposed pixel also compensates for the variation of TFT characteristics and I×R voltage rise in power line. 15‐inch AMOLED panel employing reliable a‐SPC TFT backplane and the proposed pixel has been developed.

Abstract— A new voltage‐driving active‐matrix organic light‐emitting diode (AMOLED) pixel circuit is proposed to improve the display image‐quality of AMOLED displays. Because OLEDs are current‐driven devices, the I × R voltage drop in the power lines is evitable. Accordingly, the I × R voltage‐drop compensation scheme should be included in the pixel‐driving method when a voltage‐compensation method is used. The proposed pixel was designed for the compensation of an I × R voltage drop in the power lines as well as for the compensation of the threshold‐voltage non‐uniformity of low‐temperature polycrystalline‐silicon thin‐film transistors (LTPS TFTs). In order to verify the compensation ability of the proposed pixel, SPICE simulation was performed and compared with those of other conventional pixels. When the Vss voltage varies from 0 to 1 V, the drain current of the proposed pixel decreased by under 1% while that of conventional Vth compensation methods without Vss compensation decreased by over 60%. 2.2‐in. QCIF+ full‐color AMOLED displays, which employ the proposed pixel, have been also developed. It was verified by comparison of the display image quality with a conventional panel that our proposed panel successfully overcame the voltage‐drop problems in the power lines.

Image sticking of AMOLED is caused by the property variation of driving transistors. In this paper, we investigated the hysteresis behavior of p-type p-Si thin film transistors as driving device for AMOLED. As the temperature increase, it was observed that hysteresis phenomenon was suppressed. This can be explained by that the trapping and de-trapping rate of carriers is much faster in high temperature than in room temperature.

In the conventional SLS crystallization method, we just perform a basic pre-align on the substrate stage and apply a whole substrate area scanning. Therefore, each TFT has different grain boundary(GB) location in channel region. The number of grain boundaries in channel also varies from one to two, which can cause non-uniform TFT characteristics and image quality deterioration of the panel. In this paper, we present work that has been carried out using the SLS process to control grain boundary(GB) location in TFT channel region and it is possible to locate the GB at the same location in the channel region of each TFT. We fabricated TFT by applying a new alignment SLS process and compared the TFT characteristics between a normal SLS method and the grain boundary location controlled SLS method.

No abstract