An issue facing the manager of a small business is the use of cloud computing to meet the information technology (IT) needs of the firm. These businesses typically have limited in-house IT capabilities and often outsource much of their IT. This paper discusses this rapidly evolving technology and provides a framework for businesses to decide on harnessing the power of cloud computing. It recommends the appropriate decision based on the way in which IT is currently used in the enterprise and future needs to meet competitive challenges. The potential cost savings, technology insurance from cloud computing, and security risks are discussed and factored into the decision.
An issue facing the manager of a small business is the use of cloud computing to meet the information technology (IT) needs of the firm. These businesses typically have limited in-house IT capabilities and often outsource much of their IT. This paper discusses this rapidly evolving technology and provides a framework for businesses to decide on harnessing the power of cloud computing. It recommends the appropriate decision based on the way in which IT is currently used in the enterprise and future needs to meet competitive challenges. The potential cost savings, technology insurance from cloud computing, and security risks are discussed and factored into the decision.
The increasing demand for network and high-performance devices requires large data throughputs with minimal loss or repetition. Network on chips (NoC) provides excellent connectivity among multiple on-chip communicating devices with minimal loss compared with old bus systems. The motivation is to improve the throughput of the NoC that integrated on multicores for communication among cores by reducing the communication latency. The design of the arbiter in the crossbars switch of an NoC’s router has a vital role in judging the system’s speed and performance. Low latency and high-speed switching are possible with high performance and good switching equipment at the network level. One of the significant components in NoC under SoC design is the arbiter, which governs the system’s performance. Proper arbitrations can avoid network or traffic congestions like livelock and buffer waiting. The proposed work in this paper is to design an efficient and high productive arbiter for multicore chips, especially SoCs and CMPs. The proposed arbiter is showing good improvement in the throughput at higher data rates; an average of more than 10% throughput improvement is noticed at higher flit injection rates independent of the VCs implemented. Further, the critical delays are reduced to 15.84% with greater throughputs.
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