Abstract-The realization of functions such as log() and antilog() in hardware is of considerable relevance, due to their importance in several computing applications. In this paper, we present an approach to compute log() and antilog() in hardware. Our approach is based on a table lookup, followed by an interpolation step. The interpolation step is implemented in combinational logic, in a fieldprogrammable gate array (FPGA), resulting in an area-efficient, fast design. The novelty of our approach lies in the fact that we perform interpolation efficiently, without the need to perform multiplication or division, and our method performs both the log() and antilog() operation using the same hardware architecture. We compare our work with existing methods, and show that our approach results in significantly lower memory resource utilization, for the same approximation errors. Also our method scales very well with an increase in the required accuracy, compared to existing techniques.Index Terms-Field-programmable gate arrays (FPGAs), floating point arithmetic, logarithmic arithmetic, VLSI.
In this paper, we study the cone and plate rheometer using the Gram–Schmidt factorization of the deformation gradient. This new solution has several advantages over the traditional approach. It is shown that with the use of these kinematics, one can avoid the need for using a convected, curvilinear, coordinate system, which often leads to cumbersome calculations. Here, the use of a convected coordinate system has been replaced with a certain orthonormal coordinate system that arises from the Gram–Schmidt factorization of the deformation gradient. Moreover, by using this solution procedure, it is possible to obtain the normal stress differences and shear stress explicitly. Therefore, this solution procedure opens up a possibility for characterizing material properties by using only a cone and plate rheometer.
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