The effect of a silicon germanium (SiGe) channel on pFET threshold voltage (V TH ) mismatch in 32 nm high-K/metal-gate (HKMG) process is characterised. Additional variability is observed in the SiGe-channel pFET as compared with the traditional pFET with a silicon (Si) channel. Despite the extra V TH mismatch introduced by the SiGe channel, the traditional mismatch figure of merit from a Pelgrom plot (A VT ) continuously scales down as technology advances from poly/SiON to HKMG process.Introduction: As transistors scale down in size and supply voltage reduces, the impact of threshold voltage variation on digital and analogue circuits becomes increasingly important. Threshold voltage variation between identically designed FET devices, also referred to as transistor mismatch, is traditionally dominated by random dopant fluctuation (RDF) [1, 2]. As technology advances, transistor mismatch characteristics in deep-submicron technology nodes have become more complicated with the additional effects of non-uniform doping, interface charge, and work function variations. In this Letter we discuss a new variability source introduced by the SiGe channel in state-of-the-art 32 nm HKMG technology.
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