With the growing adoption of EUV lithography in both Logic and DRAM, the stochastics associated with EUV lithography has highlighted the need for accurate line roughness metrology. One of the approaches suggested to reduce stochastic effects is to transition to MOR (Metal Oxide Resist) from the traditional CAR resists. The CDSEM is the primary workhorse used today to measure line roughness in an inline environment. However, it is known that roughness reported by CD-SEM is dependent on the image acquisition conditions and the metrology algorithm settings. On the other hand, SEM metrology for EUV now requires low landing energies to minimize resist damage and increase contrast on thin high NA EUV resists [3]. However, this combination of low-dose scanning and low landing energies significantly lowers the contrast of the SEM image leading to higher reported roughness values using traditional roughness metrology algorithms. To understand and reduce the dependence of roughness on SEM image noise, we acquired images with different imaging conditions on a post-etch wafer and thin-resist EUV wafers with different stacks. The focus of this study is to demonstrate a novel roughness metrology algorithm that reduces the sensitivity of image SNR to roughness compared to traditional metrology methods. In this paper, we provide comprehensive guidelines for measuring unbiased roughness on thin EUV resist wafers in terms of roughness metrology and scanning conditions. We hope this work can provide the basis for understanding the roughness transfer from litho to etch and better characterize EUV lithography.
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