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This paper presents how to apply order reduction in wide-band digital predistortion (DPD) linearizers using the principal component analysis (PCA) technique. This method is tested in a wireless backhauling transmitter where four 28 MHz adjacent subcarrier transmission of M-QAM signals are considered. The DPD has to counteract not only the PA nonlinear behavior, but also its dynamics. This may results critical when considering wideband signals since the number of coefficients required to model memory effects can grow dramatically. By applying the PCA technique, the number of essential parameters can be significantly reduced. In addition, a strategy to minimize the computational cost of finding the optimal coefficients is also presented. A test-bed for evaluating the DPD linearization performance of the RF subsystem when PCA is applied was deployed and experimental results are presented in this paper.

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Interference is a major obstacle in radio communications, especially when opportunistic frequency reuse is an inherent requirement for maximizing spectral efficiency in heterogeneous networks. A typical example is encountered in cellular communications where macro cell-edge users receive interference from small cell transmissions that use the same radio frequency band. Innovating interference management algorithms are employed towards this end, which due to their interdependencies with numerous parameters of the target operating scenario and various low-level implementation aspects, need to be prototyped in real-time signal processing platforms in order to be credibly verified. In this paper, we present the development and experimental validation of a macro/femto cell coexistence scenario in close to reallife conditions. The inclusion of an agile interference management scheme increased the signal processing complexity at the physical layer. This overhead was appropriately addressed by engaging advanced parallel processing techniques, optimizations of the arithmetic operations and intelligent reuse of logic and memory resources in the FPGA-based baseband processing architecture.