The step-flow growth mode is used to fabricate Si and Ge nanowires with a width of 3.5 nm and a thickness of one atomic layer (0.3 nm) by self-assembly. Alternating deposition of Ge and Si results in the formation of a nanowire superlattice covering the whole surface. One atomic layer of Bi terminating the surface is used to distinguish between the elements Si and Ge. A difference in apparent height is measured in scanning tunneling microscopy images for Si and Ge. Also, different kinds of twodimensional Si=Ge nanostructures like alternating Si and Ge nanorings having a width of 5-10 nm were grown.

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In optoelectronic devices based on quantum dot arrays, thin nanolayers of gold are preferred as stable metal contacts and for connecting recombination centers. The optimal morphology requirements are uniform arrays with precisely controlled positions and sizes over a large area with long range ordering since this strongly affects device performance. To understand the development of gold layer nanomorphology, the detailed mechanism of structure formation are probed with time-resolved grazing incidence small-angle X-ray scattering (GISAXS) during gold sputter deposition. Gold is sputtered on a CdSe quantum dot array with a characteristic quantum dot spacing of ≈7 nm. In the initial stages of gold nanostructure growth, a preferential deposition of gold on top of quantum dots occurs. Thus, the quantum dots act as nucleation sites for gold growth. In later stages, the gold nanoparticles surrounding the quantum dots undergo a coarsening to form a complete layer comprised of gold-dot clusters. Next, growth proceeds dominantly via vertical growth of gold on these gold-dot clusters to form an gold capping layer. In this capping layer, a shift of the cluster boundaries due to ripening is found. Thus, a templating of gold on a CdSe quantum dot array is feasible at low gold coverage.