Ge on insulator (GOI) is desired to obtain metal-oxide-semiconductor transistors with high performance and low leakage current. We have developed a method to make GOI based on liquid-phase epitaxial (LPE) growth on Si substrates and a defect necking technique in which defects are confined to a very short distance. Self-aligned microcrucibles were used to hold the Ge liquid. High-quality single-crystal (100) as well as (111) oriented GOI structures were obtained with a process compatible with Si-based fabrication. No dislocations or stacking faults were found in the LPE Ge films on insulator. The orientation of the Ge crystals was controlled by the seeding Si substrate. This method opens up the possibility of integrating Ge device structures in a baseline Si integrated circuit process.

Systematic studies of the heteroepitaxial growth of germanium nanowires on silicon substrates were performed. These studies included the effect of sample preparation, substrate orientation, preanneal, growth temperature, and germane partial pressure on the growth of epitaxial germanium nanowires. Scanning electron microscopy and transmission electron microscopy were used to analyze the resulting nanowire growth. Germanium nanowires grew predominantly along the ⟨111⟩ crystallographic direction, with a minority of wires growing along the ⟨110⟩ direction, irrespective of the underlying silicon substrate orientation [silicon (111), (110), and (100)]. Decreasing the partial pressure of germane increased the number of ⟨111⟩ nanowires normal to the silicon (111) surface, compared to the other three available ⟨111⟩ directions. The growth rate of nanowires increased with the partial pressure of germane and to a lesser degree with temperature. The nucleation density of nanowire growth and the degree of epitaxy both increased with temperature. However, increasing the growth temperature also increased the rate of sidewall deposition, thereby resulting in tapered nanowires. A two-step temperature process was used to initiate nanowire nucleation and epitaxy at a high temperature, followed by nontapered nanowire growth at a lower temperature. Preannealing gold films in hydrogen or argon before nanowire growth reduced the yield of nanowires grown on silicon samples, especially on silicon (111) substrates, but not on silicon oxide. Gold annealing studies performed to investigate this preanneal effect showed greater gold agglomeration on the silicon samples compared to silicon oxide. The results and conclusions obtained from these studies give a better understanding of the complex interdependencies of the parameters involved in the controlled heteroepitaxial growth of vapor-liquid-solid grown germanium nanowires.

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A rapid melt growth method was developed to produce Ge crystals including Ge pillars, nanowires, and Ge-on-insulator. Amorphous Ge was deposited and patterned, then crystallized by melting and solidifying using Si substrates for seeding. Self-aligned SiO 2 microcrucibles were used to contain the Ge liquid during the crystallization anneal. The misfit defects were terminated within small regions around the seeding windows by a necking mechanism. Crystallization calculations showed that very high epitaxial growth velocity can be achieved when the temperature of Ge liquid is lower than but close to its melting point, while the random unseeded nucleation rate is very low in the same temperature range. High-quality Ge nanowires and Ge-on-insulator structures are produced with a simple and robust process. The rapid melt growth technique works very well with a variety of film thickness, including that of nanometer ultrathin structures. The surface smoothness obtained by Ge deposition is retained during crystallization and the film thickness is also controlled by deposition.