The Back Enhanced SOI (BESOI MOSFET) is a planar reconfigurable device, which transistor type (n- or p-type) can be programed by the back-gate bias. This transistor is explored in this paper for biosensing application through numerical simulation, based on the fabricated device experimental results. The permittivity value and the charges inside the biomaterial deposited on the underlap region (between gate and source/drain contacts) influence the BESOI MOSFET drain current. The dimensions of the device were evaluated in order to optimize the sensitivity. Among the studied parameters, the underlap length was the most relevant parameter. For short underlap devices, the fringe electric field from the front gate electrode benefits the permittivity-based sensors, while long underlap length devices have a bigger sensitive area in which the charge-based sensor presented better results. Also, the n-type biased device presented higher sensitivity to positively charged materials, while the p-type biased one presented better result for negatively charged materials. The parameters optimization resulted in one order magnitude improvement of the sensitivity for the permittivity-based sensor, for both n- and p-type. As for the charge-based sensor, the optimized device presented twice as bigger sensitivity for the n-type, and at least eight times improvement for the p-type device. This fact represents an advantage of the BESOI structure as the type of the device can be chosen by the back-gate bias.
This work analyzes the third generation BESOI MOSFET (Back-Enhanced Silicon-On-Insulator Metal-Oxide-Semiconductor Field-Effect-transistor) built on UTBB (Ultra-Thin Body and Buried Oxide), comparing it to the BESOI with thick buried oxide (first generation). The stronger coupling between front and back interfaces of the UTBB BESOI device improves in 67% the current drive, 122% the maximum transconductance and 223% the body factor. Operating with seven times lower back gate bias, the UTBB BESOI MOSFET presented more compatibility with standard SOI CMOS (Complementary MOS) technology than the BESOI with thick buried oxide.
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