We fabricate and characterize a polarizationdiversity 32 × 32 silicon photonics switch by newly introducing SiN overpass waveguides onto our nonduplicate polarization-diversity path-independent insertion-loss switch. The SiN overpass waveguides are used to simplify the optical paths with a uniform path length between the edge couplers and the switch matrix and significantly reduce the number of waveguide intersections. The switch chip is fabricated using a 300-mm silicon-on-insulator wafer pilot line. The fabricated switch comprises more than 7,600 components, making this the largest ever complementary-metal-oxidesemiconductor-based silicon photonics circuit. The switch chip is electrically and optically packaged and evaluated for a sampled port connection with 32 paths, with an average on-chip loss of ∼35 dB and an average polarization-dependent loss of 3.2 dB where 75% of the measured paths exhibit a loss of less than 3 dB. The differential group delay is measured to be 1.7 ps. The performance can be further improved by optimizing the device design.
We review the research progress of strictly nonblocking optical switches based on silicon photonics. We have developed a switch chip fabrication process based on a complementary metal-oxide-semiconductor pilot line and optical and electrical packaging technologies. We demonstrated all-paths transmission and switching of up to 32 input ports × 32 output ports with an average fiber-to-fiber insertion loss of 10.8 dB. Furthermore, we demonstrated an operating bandwidth wider than 100 nm for −30 dB crosstalk with double-Mach-Zehnder element switches in an 8 × 8 switch. For polarization-insensitive operation, we adopted a polarization diversity scheme and fabricated an 8 × 8 switch with fiber-based polarization-beam-splitters and two switch chips. The 8 × 8 switch exhibited a polarization-dependent loss of less than 0.5 dB. Moreover, an on-chip polarization diversity 8 × 8 switch integrated with polarization splitter rotators and two switch matrices on a single chip demonstrated a differential group delay less than 1 ps. Based on current technologies, we discuss the prospects for further port count expansion and remaining challenges for commercial deployment.
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