Approximate Arithmetic is a new design paradigm that is being used in many applications which are tolerant to imprecision and do not require accurate results. It can reduce circuit complexity, delay and energy consumption by relaxing accuracy requirements. The partial product bit matrix can be reduced based on their progressive bit significance using a Significance Driven Logic Compression(SDLC) approach. Further, the complexity of the approximate multiplier can be reduced by using Approximate adders in place of exact adders in the accumulation method. Removing some of the transistors from an accurate adder will result in an approximate adder. By using approximate adders which have less number of transistors, the power, propagation delay, and the switching capacitance can be reduced. In this paper, approximate multipliers are implemented using different approximate adders and they are compared with an exact multiplier in terms of power, delay and energy savings.
IoT (Internet of Things) has been expanding into various business activities and people’s lives; however, IoT devices face security challenges. Further, the establishment of reliable security for IoT constrained devices is considered to be ongoing research due to several factors such as device cost, implementation area, power consumption, and so on. In addition to these factors, hardware security also poses major challenges like above mentioned; further Physical Unclonable Functions (PUFs) offer a promising solution for the authentication of IoT devices as they provide unique fingerprints for the underlying devices through their challenge-response pairs. However, PUFs are vulnerable to modelling attacks; in this research work, a lightweight hardware security framework is designed that provides the security for light edge devices. The proposed hardware security framework introduces the three-step optimized approach to offer a secure and reliable solution for IoT device authentication. The first step deals with the designing of SP-PUF, the second step deals with introducing obfuscation technique into the same, and the third step deals with introducing the authentication mechanism. A machine learning attack is designed to evaluate the model and the proposed model is evaluated considering the different stages. This research work is evaluated in two parts; the first part of the evaluation is carried out for the security mechanism through machine learning algorithm attack i.e., logistic regression, Neural Network, and SVM; further evaluation is carried out considering the PUF evaluation parameter as uniqueness and reliability. At last, comparative analysis suggest that proposed hardware security framework is safe against the machine learning attacks and achieves high reliability and optimal uniqueness.
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