The origin of hysteresis in the drain–source current (IDS)–gate‐source voltage (VGS) characteristics of atomic‐layer‐deposited (ALD) p‐type SnO thin‐film transistors (TFTs) is examined by adding ALD Al2O3 interfacial layers (IL) between the SnO channel layer and the SiO2 gate insulator (GI) layer. SnO TFTs with SiO2 GI exhibit a large hysteresis voltage (Vhy) due to the trap state density near the interface between the SnO active layer and the SiO2 GI (known as the border trap). Both experimental results and theoretical calculations show that the origin of border traps is the SnSi+0 gap states in SiO2, which is induced by the Sn diffusion into the SiO2 layer. The use of Al2O3 films as ILs suppresses this diffusion. The effectiveness, however, is dependent on the thickness, crystallinity, and density of the Al2O3 films. The Vhy of the SnO TFTs can be decreased when the thickness and density of the ILs is increased if the amorphous structure of the Al2O3 IL is maintained after the rapid thermal annealing process. p‐Type ALD SnO TFTs with optimum ILs exhibit a high on‐off ratio of IDS (1.2 × 105), high field‐effect mobility (1.6 cm2 V−1 s−1), and a small Vhy (0.2 V).
We theoretically investigate the mechanism of ferroelectric switching via interlayer shear in 3R MoS2 using first principles and lattice dynamics calculations. First principle calculations show the prominent anharmonic coupling of the infrared inactive interlayer shear and the infrared active phonons. The nonlinear coupling terms generates an effective anharmonic force which drives the interlayer shear mode and lowers the ferroelectric switching barrier depending on the amplitude and polarization of infrared mode. Lattice dynamics simulations show that the interlayer shear mode can be coherently excited to the switching threshold by a train of infrared pulses polarized along the zigzag axis of MoS2. The results of this study indicate the possibility of ultrafast ferroelectricity in stacked two-dimensional materials from the control of stacking sequence.
Increasing capacitance density could be achieved by mainly two methods: increasing the capacitor node area and adopting higher dielectric constant (κ) material. The former relates mostly to integration issues, such as deep capacitor hole etching with an aspect ratio over 50 and filling the hole with the conformal electrode material. The latter is mainly a material issue, requiring appropriate material selection and an extremely conformal film deposition process. It also must be compatible with the electrode material, which means no adverse interfacial reaction and phase-pure high-κ film growth.Given the industry-compatible and matured electrode fabrication process of TiN grown by the atomic layer deposition (ALD) process, ZrO 2 has been the leading high-κ material in DRAM fabrication. This is because the crystalline structure of the thin-film ZrO 2 transforms from the medium-κ (≈20) monoclinic phase to the high-κ (>≈40) tetragonal phase due to the surface-energy effect. [6,7] Also, the ALD process of ZrO 2 is well matured to secure mass production. However, undoped ZrO 2 has suffered from a high leakage current problem. The problem could be ascribed to the local current flow through the grain boundaries of the polycrystalline ZrO 2 [8] and the n-type nature (the Fermi level is close to the conduction band edge) of the material by the presence of oxygen vacancies. [9,10] This problem has been overcome by adopting a thin Al 2 O 3 insertion layer (IL) for the relatively thicker ZrO 2 or doping the ZrO 2 with Al for thinner films. [8][9][10][11][12] However, such a strategy has sacrificed capacitance density owing to the inclusion of the lowκ amorphous Al 2 O 3 layer (κ ∼ 6-9) or the degraded crystallinity of the Al-doped ZrO 2 . [10,13,14] Therefore, the DRAM industry has spent the enormous effort to optimize the dielectric stack structure, but it has become evident that next-generation dielectric material is necessary for further scaling.Among the diverse candidates with even higher κ-values, SrTiO 3 showed a severe incompatibility with the TiN electrode. [15,16] Hf-doping into the ZrO 2 could be a viable and immediate option, but it involves a risk of loss of discharging density and slow operation speed. This problem is owing to the possible involvement of the (anti-) ferroelectric effect of the Hf-doped This study examines the influences of the Al 2 O 3 and Y 2 O 3 insertion layers (ILs) on the structural and electrical features of ZrO 2 thin films for their application to dynamic random access memory capacitors. The ultra-thin Al 2 O 3 IL (0.1-0.2 nm) dissolves into the ZrO 2 layers, which causes the top and bottom portions of the ZrO 2 film to merge and have smaller lattice parameters. However, the thicker Al 2 O 3 IL (>≈0.4 nm) forms a continuous layer and separates the top and bottom portions of the ZrO 2 film. Interestingly, the diffusion of Al does not occur in this case. Overall, the dielectric constant (κ) of the ZrO 2 /Al 2 O 3 /ZrO 2 film is lower than that of the undoped ZrO 2 film due to the involveme...
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