All-solution processing of large-area organic electronics requires multiple steps of patterning and stacking of various device components. Here, we report the fabrication of highly integrated arrays of polymer thin-film transistors and logic gates entirely through a series of solution processes. The fabrication is done using a three-dimensional crosslinker in tetrahedral geometry containing four photocrosslinkable azide moieties, referred to as 4Bx. 4Bx can be mixed with a variety of solution-processable electronic materials (polymer semiconductors, polymer insulators, and metal nanoparticles) and generate crosslinked network under exposure to UV. Fully crosslinked network film can be formed even at an unprecedentedly small loading, which enables preserving the inherent electrical and structural characteristics of host material. Because the crosslinked electronic component layers are strongly resistant to chemical solvents, micropatterning the layers at high resolution as well as stacking the layers on top of each other by series of solution processing steps is possible.

A suitable insulating polymer material that is compatible with the fabrication process of organic transistors and has excellent electrical properties is critically required for the nextgeneration flexible organic electronics. In this study, using a onestep polymerization method, we synthesized two different solutionprocessable polyimides (PIs) incorporated with abundant trifluoromethyl groups. Not only were the two resulting PIstermed 6FDA-6FDAM-PI and 6FDA-TFMB-PIwell soluble in organic solvents, but also they showed transparent and colorless optical properties. The fluorinated PI films showed smooth surface topographies and surface energy values that were appropriate for their use in bottom-gate organic transistors. Organic transistors separately fabricated with 6FDA-6FDAM-PI and 6FDA-TFMB-PI as the gate insulators showed excellent device performance and electrical stability under various testing conditions, especially for pentacene-based devices. The excellent performance of the devices with fluorinated PIs was attributed to the enhanced microstructure of the organic semiconductor and the fluorine-rich characteristic of the underlying gate insulator. Furthermore, organic complementary circuits including the basic logic gates of NOT, NOR, and NAND were demonstrated using these devices.

A capillary pen drawing technique, developed as a new patterning methodology for the large-area patterning and fabrication of organic electronics, provides several advantages over conventional approaches: the method is simple and versatile, there are no restrictions on the patterning shapes that could be produced, and the method can be tailored to a variety of substrates.

This study systematically demonstrates the effects of the grain structure of crystalline self-assembled monolayers (SAMs) on the growth of organic semiconductor thin films on such monolayers, as well as the electrical characteristics of the resulting semiconductor films. The grain structure of the octadecyltrichlorosilane (OTS) monolayers could be tailored by constructing the monolayers at three different temperatures: −30°C (−30°C OTS), −5°C (−5°C OTS), and 20°C (20°C OTS). Among the three layers, −30°C OTS exhibited the largest crystalline grains and longestrange homogeneity of alkyl chain arrays. We found that pentacene films deposited on −30°C OTS monolayers show larger crystalline grains with higher degrees of crystallinity and lateral alignment compared to that of films deposited on −5°C OTS or 20°C OTS monolayers, following the surface characteristics of the underlying OTS monolayers. Furthermore, pentacene fieldeffect transistors fabricated with −30°C OTS monolayers showed lower charge trap densities and higher field-effect mobility values than devices fabricated using −5 or 20°C OTS monolayers. These results are explained in terms of enhanced quasiepitaxial growth of pentacene films on OTS monolayers with large grains.

The surface functionality of the gate dielectrics is one of the important variables to have a huge impact on the electrical performance of organic field-effect transistors (OFETs). Here, we describe the impact of energetically engineered dielectrics on charge transport in vacuum-deposited 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene) thin films for eventually realizing high-performance OFETs. A variety of self-assembled monolayers (SAMs) bearing amino, methyl, phenyl (PTS), or fluoro end groups were introduced onto the SiO 2 dielectric surfaces to design energetically engineered surfaces that can be used to explore the impact of surface functionalities at a TIPS-pentacene/gate dielectric interface. The solvent-free vacuum deposition of TIPSpentacene was used to exclude solution-processing effects resulting from fluid flows and solvent drying processes. The TIPS-pentacene layer on the PTS-SAM yielded the best morphological and crystalline structures, which directly enhanced the electrical properties, exhibiting field-effect mobilities as high as 0.18 cm 2 /(V s). Furthermore, the hysteresis, turn-on voltage, and threshold voltage were correlated with the surface potentials of various SAM-dielectrics. We believe that systematic investigation of the energetically engineered dielectrics presented here can provide a meaningful step toward optimizing the organic semiconductor/dielectric interface, thereby implementing flexible and high-performance OFETs.