The H.264/AVC (Advanced Video Codec) new video coding standard provides higher coding efficiency relative to former standards at the expense of higher computational requirements. Given the potential applications of this technology, we are developing an application environment able to decode an MPEG2 stream, convert it into an H.264 stream, and stream it over a network. This paper focuses on the H.264 video encoder implementation. The absolute complexity of the obtained costefficient configuration outlined the potential of using a multiple processors platform for executing a parallel code version of the H.264 reference software. For this, a starting YAPI parallel Kahn Process Network (KPN) model is proposed. This model has been implemented and validated at a high system-level using the YAPI multi-threading programming interface. To identify the potential bottlenecks of the starting parallel model, communication and computation workload analysis are considered. Based on this analysis, an optimized parallel YAPI/KPN model with maximum workload balance is provided. For cost-effective realization, mapping the validated parallel model on the STMicroelectronics mb392 multiprocessor platform is motivated. For this purpose, a static code parser for the ST220 Very Large Instruction Word (VLIW) processor is developed to analyze, for each process of the model, the instruction level parallelism (ILP) effectively used by the ST220 cross compiler. Using this tool, the binary code of each process, cross-compiled for an ST220, is statically analyzed and the processes demanding further low level optimization are identified. To maximize the ILP for the ST220 VLIW architecture, a low-level algorithmic optimization of the motion estimation and compensation process is performed.
The system-level modeling and simulation framework Sesame/Artemis aims to efficiently explore the design space of heterogeneous embedded multimedia architectures. The Sesame environment provides several methods and tools to quickly and separately build the application process network model, the target architecture model, and the mapping model of the application onto the architecture. In addition, this tool is designed to allow the refining simulation models smoothly across different abstraction levels and to include support for refining only parts of an architecture model, creating a mixedlevel simulation model. In this paper, the Sesame software framework is selected to implement at the black-box architecture model level a parallel H.264/AVC video encoding application targeting multiprocessors platforms. INTRODUCTIONThe architectural complexity of SoC-based embedded systems, as well as design requirements regarding real-time performance, high flexibility; low power consumption and cost greatly complicate the system design. Nowadays, the classical design methods, typically starting from a single application specification became short used for designing such an embedded system.In order to resolve the increasing design complexity, researchers have recently come up with a new design concept called system-level design [1], [2]. For this purpose, several system-level tools and methodologies have been introduced to efficiently explore the design space of heterogeneous signal processing systems. Each tool/methodology directly reflects a well-defined design flow.Y-chart, considered as the most popular approach for designing multimedia oriented systems, is already being followed in most recent system-level design works. It tries to improve the shortcomings of the classical HW/SW co-design approach by abandoning the usage of low-level (instruction-level or cycleaccurate) simulators for the design space exploration at an early stage of the flow, and abandoning a single system specification to describe both hardware and software parts. The Y-chart methodology recognizes a clear separation between an application model, an architecture model and an explicit mapping step to relate the application model to the architecture model. The application model describes the functional behavior of an application, independent of architectural specifics like the HW/SW partitioning or timing characteristics. The architecture model defines the architecture resources, captures their timing characteristics, and then simulates the performance consequences of the application events (communication and computation operations) for software (programmable components) and hardware (reconfigurable/dedicated) executions.The system-level modeling and simulation framework Sesame/Artemis is developed to directly reflect the Y-chart design approach. It provides several methods and tools to quickly and separately build the application process network model, the target architecture model, and the mapping model of the application onto the architecture. In th...
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.
hi@scite.ai
10624 S. Eastern Ave., Ste. A-614
Henderson, NV 89052, USA
Copyright © 2024 scite LLC. All rights reserved.
Made with 💙 for researchers
Part of the Research Solutions Family.