reduced lifetime for time dependent dielectric breakdown Abstract (TDDB), associated with surface contamination and loss of selectivity [10][11][12][13]. This problem is especially for CMOS Leakage and dielectric breakdown of SiO2 are studied for imager applications, where thick capping layers are required Cu interconnect structures with either stand-alone CoWP or [9]. A number of approaches have been used to minimize two-layer CoWP+SiN caps. Without a post-CoWP plasma this problem, including wet cleaning or plasma cleaning clean, there are many early fails and the dielectric after electroless deposition [10,11], or chemical grafting breakdown exhibits bimodal behavior. By adding a plasma prior to electroless deposition [12]. In the previous reports, clean after CoWP deposition, the early fails can be a dielectric capping layer was used in addition to the metal eliminated and high dielectric breakdown is achieved. The capping layer (i.e. two-layer cap). In this paper, leakage improvement in dielectric breakdown with the plasma clean current and dielectric breakdown are compared for a Cu is greater for the two-layer cap compared to the stand-alone wires with either a stand-alone CoWP capping layer or a cap, probably due to the extra plasma clean associated with two-layer, CoWP + SiN capping layer. SiN deposition. Experiment
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