We fabricated 13 440 molecular electronic devices using different lengths of alkanethiol self-assembled monolayers and performed statistical analyses on the histograms of the electronic transport properties of the alkanethiols. The statistical analysis provides criteria for defining ‘working’ molecular electronic devices and selecting ‘representative’ devices. The yield of the working alkanethiol devices was found to be ∼1.2% (156 out of 13 440 devices) and average transport parameters such as current density, transport barrier height, effective electron mass and tunnelling decay coefficient were obtained from the statistically defined working molecular electronic devices. From the length-dependent tunnelling and temperature-variable current–voltage characteristics of the working devices, the alkanethiol molecular devices showed typical tunnelling transport. However, the statistical consideration for determining working molecular devices should be carried out prior to these characterizations or detailed analysis on them.

A new technology for the fabrication of reliable solid‐state molecular devices using a graphene multilayer as the top electrode is introduced. Graphene‐electrode molecular devices were fabricated in high yield with good junction conductance. These devices also have excellent durabilities, thermal and operational stabilities, and device lifetimes.

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as the thermal budget has increased rapidly in recent years, which could surpass the future revenue generated worldwide by the semiconductor industry. [4,5] Consequently, electronic miniaturization limits the sustainable growth of computing technology. The von Neumann design is a conventional computing architecture, which separates the processor and memory unit. This architecture performs a computational task through sequential procedures and has functioned a mainstay of modern computing since 1945. [6] In fact, the architecture is significantly beneficial to both hardware and software developers because each component can be improved and readily extended into a united electronic system, even without a comprehensive understanding of all the components. However, the von Neumann bottleneck generates substantial power consumption and latency during the computing operation. [2,7] This limitation results from data transmission between two functional units (processor and memory), particularly when the memory is accessed through a bus with restricted bandwidth. [2,7] Moreover, according to the International Data Corporation (IDC), global data will rapidly increase to 175 ZB (1.75 × 10 23 B) by 2025. [8] Consequently, the von Neumann bottleneck will be more detrimental under tremendous workload because it may be produced by the daily operation of the design. Recently, there has been increasing demand for intellectual computers that can efficiently process substantial global data, thereby resulting in the development of a wide range of softwareor hardware-based artificial neural networks (ANNs) aimed at achieving the computing ability of the human brain. [2,9] Softwarebased ANNs have recently exhibited remarkable capabilities, such as image recognition, [10,11] natural language processing, [12,13] and performing specific tasks, [14] some beyond the human level. However, since existing ANNs are built on conventional computing architecture, that is, the von Neumann architecture, the learning parameters stored in memory are iteratively introduced to the processor to perform a task. The bottleneck issue arising from the movement of large datasets would eventually reduce the energy and time efficiency when operating the ANN software. [2,7] To alleviate this problem, several advanced software-and hardware-based ANN approaches have been suggested. [2,7,15-17] Advanced algorithms, such as network pruning, quantization, Huffman coding, and knowledge distillation, have been Memristors have recently attracted significant interest due to their applicability as promising building blocks of neuromorphic computing and electronic systems. The dynamic reconfiguration of memristors, which is based on the history of applied electrical stimuli, can mimic both essential analog synaptic and neuronal functionalities. These can be utilized as the node and terminal devices in an artificial neural network. Consequently, the ability to understand, control, and utilize fundamental switching principles and various types of device architectures of the...

The ability of high‐order tuning of the synaptic plasticity in an artificial synapse can offer significant improvement in the processing time, low‐power recognition, and learning capability in a neuro‐inspired computing system. Inspired by light‐assisted dopamine‐facilitated synaptic activity, which achieves rapid learning and adaptation by lowering the threshold of the synaptic plasticity, a two‐terminal organolead halide perovskite (OHP)‐based photonic synapse is fabricated and designed in which the synaptic plasticity is modified by both electrical pulses and light illumination. Owing to the accelerated migration of the iodine vacancy inherently existing in the coated OHP film under light illumination, the OHP synaptic device exhibits light‐tunable synaptic functionalities with very low programming inputs (≈0.1 V). It is also demonstrated that the threshold of the long‐term potentiation decreases and synaptic weight further modulates when light illuminates the device, which is phenomenologically analogous to the dopamine‐assisted synaptic process. Notably, under light exposure, the OHP synaptic device achieves rapid pattern recognition with ≈81.8% accuracy after only 2000 learning phases (60 000 learning phases = one epoch) with a low‐power consumption (4.82 nW/the initial update for potentiation), which is ≈2.6 × 103 times lower than when the synaptic weights are updated by only high electrical pulses.