This paper presents our continuous-time Hierarchical Field Programmable Analogue Array (HFPAA) designed as a result of our research efforts to enable rapid prototyping for analogue system design. Here, we present our continuoustime configurable analogue block (CAB) used for our HF-PAA, with increased flexibility in facilitating a hierarchical approach to analogue design and also in configuring target applications. This is achieved by minimising the dependence of our CAB on external passive components and with our hierarchical structure formed by "clustering" these CABs. On the basis of results from our first prototype HFPAA fabricated in AMS 0.6µm CMOS process, we also present our methodology of establishing the relationship between the routability of our HFPAA and the flexibility of its interconnection structures. The analysis of the hierarchical interconnection structure is performed using our algorithm we introduce here, as we believe there has been no prior work/methodology established for an HFPAA. Our algorithm for interconnectivity analysis of our HFPAA, is presented here. Work to date has established our design methodology and feasibility of our hierarchical approach to analogue system design.
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