Neuromorphic hardware computing is a promising alternative to von Neumann computing by virtue of its parallel computation, and low power consumption. To implement neuromorphic hardware based on deep neural network (DNN), a number of synaptic devices should be interconnected with neuron devices. For ideal hardware DNN, not only scalability and low power consumption, but also a linear and symmetric conductance change with the large number of conductance levels are required. Here an all-solid-state polymer electrolyte-gated synaptic transistor (pEGST) was fabricated on an entire silicon wafer with CMOS microfabrication and initiated chemical vapor deposition (iCVD) process. The pEGST showed good linearity as well as symmetry in potentiation and depression, conductance levels up to 8,192, and low switching energy smaller than 20 fJ/pulse. Selected 128 levels from 8,192 used to identify handwritten digits in the MNIST database with the aid of a multilayer perceptron, resulting in a recognition rate of 91.7 %.

The plasmonic coupling, the enhanced electromagnetic field occurring through a uniform and small separation between metallic particles, is required for better application to localized surface plasmon resonance. Graphene has been studied as a good spacer candidate because of its precise controllability at subnanoscale. Here, the enhancement of plasmonic coupling among metallic nanoparticles (NPs) uniformly spread out on both sides of a graphene spacer is experimentally and simulatively investigated. Additionally, the post‐evaporated flat structure is rippled along one direction to reduce the separation between nanoparticles. As the amount of rippling increases, the enhancement factor (EF) of the plasmonic coupling increases almost linearly or quadratically depending on the size of nanoparticles. Such a highly rippled nanostructure is believed to not only increase the plasmonic coupling in either side of the spacer but lead to a higher density of “hot spots” through the spacer gap also. The observed EFs of a structure with the MLG spacer are consistent with the simulation results obtained from the classical electrodynamics. On the other hand, the SLG case appears to be inconsistent with such a classical approach, indicating that the plasmon tunneling through the thin barrier is prevalent in the case of the SLG spacer.

Most IoT products or their constituent elements such as chips are vulnerable to various types of security attack, such as side channel attacks and physical cloning attacks. [2][3][4] Stored or processed information can be exposed to a hacker via timing analysis, [5] power analysis, [6] electromagnetic radiation analysis, [7] data remanence analysis, [8] etc.There are several kinds of security methods, such as embedded security element, [9] trusted platform module, [10] and true random number generator, [11,12] have been proposed to improve security and save power consumption of IoT devices. Alternatively, a physical unclonable function (PUF) device has also attracted considerable attention to address the aforementioned shortcomings. [13][14][15][16] The PUF should be unpredictable, irreproducible, and statistically unbiased, based on inherent randomness derived from the unavoidable variability that occurs during device fabrication. A PUF in a chip can be analogous to a fingerprint or an iris in a human. With these features, the PUF generates distinctive challenge/response pairs to allow security functions such as authentication and key storage. And it can also be used for anti-counterfeiting integrated circuits, protecting intellectual property, and software licensing. [17] To implement an ideal PUF, two essential conditions should be satisfied: 1) it must be easy to create randomness but impossible to predict it, and 2) it must be easy to make a PUF device but difficult to duplicate it.PUF devices can be categorized into roughly three groupscircuit-based PUF, memory-based PUF and the other types including micro-electro-mechanical-system (MEMS) PUF, and optical PUF. The circuit-based PUF such as arbiter PUF, [18] ring oscillator (RO) PUF, [19] and glitch PUF, [20] primarily used a delay time as a representative metric. The memorybased PUF, including static random access memory (SRAM) PUF, [21,22] flash memory PUF, [23,24] RRAM PUF, [25,26] DRAM PUF [27,28] used device-to-device variations arisen from microfabrication [29][30][31][32] as the typical variables. A few representatives are the variations of on-state current, threshold voltage, retention time, etc.With the advance of internet of things, numerous electronic devices are being connected to each other through the internet. As the number of connections has increased, security has become increasingly important. Physically unclonable function (PUF) is one of the essential approaches that can be used to secure data in device. In this work, an independently controlled double-gate (ICDG) transistor composed of a poly-crystalline silicon (poly-Si) nanowire channel for PUF is first demonstrated. Simply fabricated using CMOS processes, the so-called PUF transistor harnesses multi-states and self-destruction for advanced security. The randomness in the poly-Si nanowire channel is established by the randomly distributed poly-Si grains. This random distribution means each transistor has a different threshold voltage (V th ). Moreover, multi-states composed of a primar...

This paper describes the fabrication and characterization of a reconfigurable Yagi-Uda antenna based on a silicon reflector with a solid-state plasma. The silicon reflector, composed of serially connected p-i-n diodes, forms a highly dense solid-state plasma by injecting electrons and holes into the intrinsic region. When this plasma silicon reflector is turned on, the front-realized gain of the antenna increases by more than 2 dBi beyond 5.3 GHz. To achieve the large gain increment, the structure of the antenna is carefully designed with the aid of semiconductor device simulation and antenna simulation. By using an aluminum nitride (AlN) substrate with high thermal conductivity, self-heating effects from the high forward current in the p-i-n diode are efficiently suppressed. By comparing the antenna simulation data and the measurement data, we estimated the conductivity of the plasma silicon reflector in the on-state to be between 104 and 105 S/m. With these figures, silicon material with its technology is an attractive tunable material for a reconfigurable antenna, which has attracted substantial interest from many areas, such as internet of things (IoT) applications, wireless network security, cognitive radio, and mobile and satellite communications as well as from multiple-input-multiple-output (MIMO) systems.

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