Physical-gap-channel graphene field effect transistor with high on/off current ratio for digital logic applications Appl. Phys. Lett. 101, 143102 (2012) Short channel mobility analysis of SiGe nanowire p-type field effect transistors: Origins of the strain induced performance improvement Appl. Phys. Lett. 101, 143502 (2012) Terahetz detection by heterostructed InAs/InSb nanowire based field effect transistors Development of high-performance fully depleted silicon-on-insulator based extended-gate field-effect transistor using the parasitic bipolar junction transistor effect Appl. Phys. Lett. 101, 133703 (2012) Abnormal interface state generation under positive bias stress in TiN/HfO2 p-channel metal-oxide-semiconductor field effect transistors
Articles you may be interested inResponse to "Comment on 'Assessment of field-induced quantum confinement in heterogate germanium electron-hole bilayer tunnel field-effect transistor'" [Appl.Physical operation and device design of short-channel tunnel field-effect transistors with graded silicongermanium heterojunctions J. Appl. Phys. 113, 134507 (2013); 10.1063/1.4795777Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate Appl. Phys. Lett. 98, 153502 (2011); 10.1063/1.3579242Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applicationsIn this paper, we perform a study of novel source structures in double-gate (DG) Tunneling Field-Effect Transistors (TFETs) by two-dimensional numerical simulation of source structures in double gate tunneling field effect. Extended source structures are employed in both pure Ge TFETs and Ge-source Si-body TFETs, and on-state current enhancement is observed in simulation results. Compared with conventional p þ -p À -n þ TFETs, the p þ region in extended source TFETs extends underneath the gates. When large gate bias is applied, high electric field n, which distributes along p þ -p À junction edge extends into the middle of the channel. More tunneling paths with short lengths are available in the on-state, effectively boosting the drive current of TFET. In addition, the extent of performance enhancement depends on the geometry of the extended source. By incorporating heterojunction, TFET drive current can be increased further, which is up to 0.8 mA/lm at V GS ¼ V DS ¼ 0.7 V. V C 2012 American Institute of Physics.
In this work, we demonstrate by simulation and experiment that the performance of a p+ Si0.5Ge0.5 source tunnel field-effect transistor (TFET) can be improved by inserting an undoped Ge layer between source and channel. The Ge layer suppresses diffusion of boron into the Si channel and it also forms a Si0.5Ge0.5/Ge/Si hole quantum well, leading to an abrupt boron profile and a high hole concentration at the source edge. At the Ge/Si heterojunction, the presence of compressive strain in the Ge layer increases the valence band offset, while the tensile strain in the Si channel increases the conduction band offset, which effectively reduces the tunnel barrier and enhances the tunnel probability. Compared with a control device without the Ge layer, TFETs with a Si0.5Ge0.5/Ge source show a higher on-state current I
ON and improved threshold voltage V
TH and subthreshold characteristics.
This paper reports the fabrication and characterization of AlGaN/GaN-on-sapphire metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs) using a complementary metal–oxide–semiconductor (CMOS) compatible gold-free process. Devices with a gate-to-drain spacing L
GD of 20 µm achieved an off-state breakdown voltage V
BR of 1400 V and an on-state resistance R
on of 22 mΩ·cm2. This is the highest V
BR achieved so far for gold-free AlGaN/GaN MOS-HEMTs. In addition, high on/off current ratio I
on/I
off of ∼109 and low gate leakage current I
G of ∼10-11 A/mm were also obtained.
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