Highly oriented [111] Cu grains with densely packed nanotwins have been fabricated by direct-current electroplating with a high stirring rate. The [111]-oriented and nanotwinned Cu (nt-Cu) allow for the unidirectional growth of Cu(6)Sn(5) intermetallics in the microbumps of three-dimensional integrated-circuit packaging; a uniform microstructure in a large number of microbumps of controlled orientation can be obtained. The high-density twin boundaries in the nt-Cu serve as vacancy sinks during the solid-state reaction between Pb-free solder and Cu and greatly reduce the formation of Kirkendall (or Frenkel) voids.
Direct Cu-to-Cu bonding was achieved at temperatures of 150–250 °C using a compressive stress of 100 psi (0.69 MPa) held for 10–60 min at 10−3 torr. The key controlling parameter for direct bonding is rapid surface diffusion on (111) surface of Cu. Instead of using (111) oriented single crystal of Cu, oriented (111) texture of extremely high degree, exceeding 90%, was fabricated using the oriented nano-twin Cu. The bonded interface between two (111) surfaces forms a twist-type grain boundary. If the grain boundary has a low angle, it has a hexagonal network of screw dislocations. Such network image was obtained by plan-view transmission electron microscopy. A simple kinetic model of surface creep is presented; and the calculated and measured time of bonding is in reasonable agreement.
We report an approach to fabricating (111)oriented and nanotwinned Cu (nt-Cu) by dc electroplating. A 200 nm thick Cu with (111) preferred orientation is required as a seed layer. Highly oriented Cu films with densely packed nanotwins can be grown to exceed 20 μm thick at high current and high stirring speeds. X-ray diffraction indicates that the intensity ratio of ( 111) to ( 220) is as high as 506, which is the highest among the reported electroplated Cu films. The spacing of twins ranges from 10 to 100 nm, which reveals a high hardness value of 2.23 GPa. The (111)-oriented nt-Cu will have many potential applications in interconnects and 3D IC packaging.
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